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Instituto Federal de Santa Catarina Campus Joinville Curso Tecnólogo em Mecatrônica Industrial Samuel Filipe Carstens Tiago Alexandre Carstens Makson Vieira Relatório de Desenvolvimento Projeto de Fonte Simétrica Ajustável Projeto de Gerador de Sinal PWM Projeto de Aquisição de dados Joinville - SC Julho de 2010

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Page 1: Instituto Federal de Santa Catarina Curso Tecnólogo em ...matsumi/geral/Eletronica_projetos/... · 2.1.6. 6º Saída ... A ponte-H tem a tarefa de fazer o chaveamento do motor,

Instituto Federal de Santa CatarinaCampus Joinville

Curso Tecnólogo em Mecatrônica Industrial

Samuel Filipe CarstensTiago Alexandre Carstens

Makson Vieira

Relatório de Desenvolvimento

Projeto de Fonte Simétrica AjustávelProjeto de Gerador de Sinal PWM

Projeto de Aquisição de dados

Joinville - SCJulho de 2010

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Sumário:

1. Introdução.............................................................................................................................................3 2. Fonte Simétrica Ajustável.....................................................................................................................4

2.1. Diagrama de Blocos......................................................................................................................4 2.1.1. 1º Rede.................................................................................................................................4 2.1.2. 2º Transformador.................................................................................................................4 2.1.3. 3º Ponte Retificadora...........................................................................................................4 2.1.4. 4º Filtro Capacitivo...............................................................................................................6 2.1.5. 5º Regulador de Tensão.......................................................................................................6 2.1.6. 6º Saída................................................................................................................................7 2.1.7. Dimensionamento dos Componentes..................................................................................7

2.1.7.1. Fórmulas....................................................................................................................7 2.1.7.2. Cálculos......................................................................................................................7

2.2. Esquema eletrônico da fonte........................................................................................................8 2.3. Layout da placa da fonte simétrica ajustável...............................................................................9

3. Gerador de Sinal PWM........................................................................................................................10 3.1. Diagrama de Blocos....................................................................................................................10

3.1.1. 1º Gerador Dente de Serra 555..........................................................................................10 3.1.1.1. Componentes Utilizados..........................................................................................11 3.1.1.2. Cálculos....................................................................................................................11 3.1.1.3. Forma de onda Scope1.............................................................................................12

3.1.2. 2º Offset Negativo..............................................................................................................12 3.1.2.1. Forma de onda sobre Pot2.......................................................................................13

3.1.3. 3º Buffer.............................................................................................................................13 3.1.3.1. Fórmulas para o Buffer.............................................................................................14 3.1.3.2. Formas de onda pós-buffer......................................................................................14

3.1.4. 4º Amplificador Somador...................................................................................................15 3.1.4.1. Formas de onda na entrada e saida do amplificador somador................................16 3.1.4.2. Cálculos para Amplificação.......................................................................................17

3.1.5. 5º Ajuste PWM...................................................................................................................17 3.1.6. 6º Comparador...................................................................................................................18 3.1.7. 7º Saída PWM.....................................................................................................................18

3.2. Esquema eletrônico do gerador de sinal PWM...........................................................................19 3.3. Layout da placa do gerador de sinal PWM .................................................................................20

4. Placa de Conexões...............................................................................................................................21 4.1. Diagrama de Blocos....................................................................................................................21 4.2. Esquema Eletrônico da placa de conexões.................................................................................22 4.3. Layout da placa de conexões......................................................................................................23

5. Ponte – H.............................................................................................................................................24 5.1. Diagrama de Blocos....................................................................................................................24 5.2. Esquema eletrônico da ponte-H.................................................................................................25 5.3. Layout da placa ponte-H.............................................................................................................26

6. Leitura do Encoder, placa Contadores.................................................................................................27 6.1. Diagrama de Blocos....................................................................................................................27

6.2. Esquema eletrônico da placa Contadores...................................................................................28 6.3. Layout da placa Contadores........................................................................................................29

7. Placa Decodificadora/Displays............................................................................................................30 7.1. Diagrama de Blocos....................................................................................................................30 7.2. Esquema eletrônico da placa Decodificadora/Displays..............................................................30 7.3. Layout da placa Decodificadora/Displays...................................................................................31

8. Conclusão............................................................................................................................................32

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9. Imagens do desenvolvimento do projeto............................................................................................33 10. Datasheets dos componentes utilizados (bibliografia).......................................................................44

10.1. Datasheet Diodo 1N4007 10.2. Datasheet Diodo 1N5408 10.3. Datasheet Diodo Zener BZX55C3V3 10.4. Datasheet LM317 10.5. Datasheet LM337 10.6. Datasheet LM324 10.7. Datasheet LM555 10.8. Datasheet L7805 10.9. Datasheet Transistor BC548 10.10. Datasheet Transistor Darlington TIP122 10.11. Datasheet Transistor Darlington TIP125 10.12. Datasheet Circuito Integrado DM74LS14 10.13. Datasheet Circuito Integrado DM74LS48 10.14. Datasheet Circuito Integrado DM74LS90 10.15. Datasheet Display 7 segmentos 1 dígito 10.16. Datasheet Display 7 segmentos 2 dígitos 10.17. Datasheet Motor AK280 5R-193

Todos os datasheets foram retirados do site: WWW.datasheetcatalog.com Com exceção dos displays, que foram retirados diretamente do site do fabricante: WWW.sunled.com E do motor, que foi retirado do site do revendedor: www.akiyama.com.br/site/

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1. Introdução:

Foi proposto o desenvolvimento de uma mesa de posicionamento, movimentada através de um motor de corrente contínua, com velocidade ajustável, e também um circuito digital que contasse o deslocamento da mesa, através da contagem do número de voltas efetuadas pelo motor. Na estrutura mecânica foram utilizados perfis de alumínio extrudado, pela praticidade de montagem e grande flexibilidade e precisão. Foi acoplado ao motor um fuso (barra roscada M6), pois o passo por volta é de 1mm. As guias lineares nas laterais da estrutura que sustentam a mesa são de aço inoxidável trefilado de Ø8mm, dispensando assim a usinagem, pois tem um ótimo acabamento externo. As bases das guias e da mesa bem como do fuso são todas feitas de nylon, pela facilidade de usinagem e confecção das mesmas. Desenvolvemos uma fonte simétrica ajustável, com capacidade para suportar até 1,5 ampères com uma tensão ajustável entre 1,25V e 16V. A mesma alimentará toda parte eletrônica-analógica, isto inclui, geração de sinal PWM, conexões (chaves fim-de-curso), ponte-H e motor. A fonte simétrica é ajustada para fornecer +12V, -12V e GND. O sinal PWM é baseado no circuito integrado LM555, onde é gerado uma onda dente de serra e posteriormente é ajustado conforme a necessidade através de amplificadores operacionais LM324. A ponte-H tem a tarefa de fazer o chaveamento do motor, conforme o sinal PWM que é direcionado através da placa conexões, que recebe os sinais de todas as chaves. Quanto à parte eletrônica-digital, tínhamos o objetivo de fazer um contador up/down, que mostraria a posição da mesa em um display, sendo que para um lado seria uma contagem crescente, e para o outro lado decrescente, resultando assim na variação do deslocamento da mesa, no caso ∆x. Devido ao fato do contador 74LS193 ser hexadecimal e não possuir reset interno decimal, ou seja, de 0 para 9 tanto como de 9 para 0, tornaria o desenvolvimento mais elaborado, e devido a um curto prazo, optamos por fazer um contador crescente utilizando o contador 74LS90 com botão de reset externo.

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2. Fonte Simétrica Ajustável:

2.1. Diagrama de blocos:

2.1.1. 1º Rede:

Tensão fornecida pela concessionária local (celesc): Vef = 220V f=60Hz

2.1.2. 2º Transformador:

Tem a função de reduzir a amplitude da tensão de 220Vef para 15Vef.

Características do transformador: 220V / 15V + 15V X 1A

2.1.3. 3º Ponte Retificadora:

A ponte retificadora tem como função transformar a tensão alternada em tensão contínua, tendo um

potencial positivo e um potencial negativo a uma mesma referencia (Terra).

Semi-ciclo positivo: D2 conduz para referência positiva, enquanto D3 conduz para referência negativa.

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Semi-ciclo negativo: D1 conduz para referência positiva, enquanto D4 conduz para referência negativa.

Formas de onda (referência positiva) sem filtro capacitivo:

Obs¹.: O Mesmo se aplica à referência negativa, porém com os gráficos invertidos.

Obs².: Considerando diodos ideais, e desconsiderando a queda de tensão ≈ 0,7V em cada diodo.

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2.1.4. 4º Filtro Capacitivo:

Sua função é atenuar a variação da tensão de ripple. A tensão de ripple varia conforme a carga.

Forma de onda (referência positiva):

Obs¹.: O Mesmo se aplica à referência negativa, porém com o gráfico invertido.

Obs².: Considerando diodos ideais, e desconsiderando a queda de tensão ≈ 0,7V em cada diodo.

2.1.5. 5º Regulador de Tensão Ajustável:

Tem como objetivo ceifar a tensão de ripple, para uma tensão menor que Vmin, esta pode ser ajustada

por POT1 para referência positiva, e POT2 para referência negativa.

C3, C4, C5, C6, C7 e C8 são capacitores de filtros recomendados pelo fabricante dos reguladores LM-317

e LM-337.

Formulas para o cálculo da tensão de saída dos reguladores:

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2.1.6. 6º Saída:

Formas de onda na saída da fonte:

A saída será um sinal DC limpo, com sua amplitude ajustada pelos potenciômetros POT1 e POT2.

Obs.: O Mesmo se aplica à referência negativa, porém com o gráfico invertido.

2.1.7. Dimensionamento dos Componentes:

2.1.7.1. Fórmulas:

. .

2

2

2

2.1.7.2. Cálculos:

Transformador: 220V / 15V + 15V x 1A ~ 60Hz

15. √2 21,21 21,21 0,7 20,51 ã 17 á 16Ω 20,51 17 3,51

21,21 3,512

19,455 120&' (2 )

19,455120.16.3,51

2880+, -. - /. 3300+,

Recalculando a partir do capacitor adotado:

19,455120.16.3300+

3,07 20,51 3,07 17,44

20,51 17,442

18.975 0 1 0.ê- 3í 51.á6 71,25 0 1 (18,975 1,25). 1

0 1 17,7258 (9Á;<9=) 3í á 51.á6 16 0 1 (18,975 16). 1

0 1 2,9758 (9Í?<9=)

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2.2. Esquema Eletrônico da Fonte:

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2.3. Layout da Fonte

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3. Gerador de Sinal PWM:

3.1. Diagrama de Blocos:

3.1.1. 1º Gerador Dente de Serra 555:

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Ra, Rb e C controlam a freqüência e o período alto e período baixo, de acordo com as fórmulas: & 0,693. ( 2. @).

1,44( 2. @).

& 0,693. ( @). 0,693. @.

A @ 2@

1

Onde: 0 BC & 0í /. BC 0í D BC ,E1ê- BF'C A A1.G -

3.1.1.1. Componentes Utilizados:

18HΩ @ 330Ω 1+, 3.1.1.2. Cálculos:

0,693. (18I 2.330). 1+ 12,93138 & 0,693. (18H 330). 1+ & 12,70269

0,693.330.1+ 0,22869

112,93138

77,33F'

A 33018I 2.330

A 0,017

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3.1.1.3. Forma de onda Scope1:

Vemos que na saída do gerador temos uma freqüência diferente dos cálculos, devido a variação dos valores dos componentes utilizados. Podem-se notar também os valores de tensão 8 e 3,92. 3.1.2. 2º Offset-Negativo:

Até então, obtemos uma onda dente de serra com um offset de ≈ 4V. Para podermos utilizá-la, devemos tirar esse deslocamento do ponto zero, somando essa onda com um sinal DC ≈ -4V. Para obtermos esta tensão, fizemos um divisor de tensão negativo, com um resistor 4 10HΩ e com um trimpot 0.2 100HΩ. Como mostra o circuito abaixo:

. 4

4 12. 0.210H 0.2

0.2 2,5HΩ Pot2 deve ser ajustado em 2,5KΩ para obter uma tensão = -4V sobre ele.

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3.1.2.1. Forma de onda sobre Pot2:

Devido à imprecisão no momento do ajuste do trimpot Pot2, não foi possível obter -4V preciso, porém não

afetará a sequencia do ajuste da onda.

3.1.3. 3º BUFFER:

O Buffer tem como função isolar os circuitos anteriores e posteriores a ele. Exemplos de buffers utilizados:

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3.1.3.1. Fórmulas para o Buffer:

0 1 0 1 01 1

3.1.3.2. Formas de onda pós-buffer:

Scope2 Scope3

Scope6

Na figura Scope3, notamos um certo ruído no sinal vindo do divisor de tensão negativo, o qual não ocorria antes do buffer. Este ruído foi percebido na montagem em protoboard, a princípio foi constatado que poderia ser ruido do protoboard, já que este ruido não ocorria antes do buffer, o circuito integrado estava 100% e adicionando capacitores o ruído persistia. Mesmo após a confecção da PCI, notamos que ainda havia o ruído, porém analisamos que ele não influencia no sinal PWM de saída, portanto não foi preciso eliminá-lo.

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3.1.4. 4º Amplificador Somador:

Nesta etapa, as tensões em R1 e R2 são somadas entre sí, retirando o offset da onda Dente de Serra formada pelo 555, conforme Figura 3. Porém o resultado dessa soma, é uma onda com amplitude de 1,66V, que é muito baixa, e se fosse aplicada diretamente no comparador, o sinal PWM de saída não teria um ajuste fino. Portanto é necessário amplificar esse sinal o máximo possível, no caso = +Vcc, ou seja 12V.

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3.1.4.1. Formas de onda na entrada e saida do amplificador somador:

Figura 1 Figura 2

Figura 3

As figuras anteriores mostram a soma do sinal Dente de Serra do 555 (pós-buffer) e do Offset negativo (pós-buffer). Agora precisamos amplificar o sinal, para obtermos um ajuste fino no comparador.

Figura 3 (entrada do amplificador) Figura 4 (saída do amplificador)

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3.1.4.2. Cálculos para Amplificação:

Com base nos cálculos, obtivemos um pico de onda = 17,6V. Como a alimentação dos amplificadores é de +12V e -12V, não é possível obter tal amplitude. Com o auxílio do osciloscópio digital, verificamos que a amplitude máxima possível, sem saturar a onda foi de 10,4V, fazendo o ajuste no Trimpot (Pot1).

J1 K0.13 LM . 1 22

Equação do amplificador.

Amplificação máxima, considerando:

0.1 100HΩ (á ) 3 10HΩ 1 8 (-) 2 4,8

K1 100H10H L . 8 4,8

2

11 . 3,22

17,6

Amplificação máxima possível:

10,4 3 10HΩ 1 8(-) 2 4,8

10,4 K1 0.110H L . 8 4,8

2

10,4 1,6 1,6. 0.110H

0.1 10,4 1,61,6 . 10H

0.1 55HΩ

3.1.5. 5º Ajuste PWM:

É nesta etapa que é feito o ajuste da freqüência do sinal PWM. Novamente é usado um divisor de tensão e um buffer em seguida, como mostra a figura abaixo.

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3.1.6. 6º Comparador:

Parâmetros do comparador: Se N então 1. -- Se O então 1. -- Como o sinal de saída deve partir de 0V (GND) até 12V, com forma de onda quadrada, o circuito integrado no qual foi usado o ampop para fazer o comparador teve de ser alimentado da seguinte maneira:

-- 12 e – -- Q?A. Na entrada negativa (V-), o sinal vem do amplificador, e na entrada positiva (V+), o sinal vem do ajuste PWM. Se a tensão sobre Pot3 for ≥ 10,4V não haverá ajuste, pois a saída será +Vcc, pois V+ será maior que V-. Sendo assim, concluímos que para haver ajuste na saída PWM, a tensão sobre Pot3 deve variar entre 0V e 10,4V. Com essa informação podemos calcular a resistência máxima do Trimpot (Pot3) para o ajuste. Cálculo do divisor de tensão (ajuste PWM) para máxima resistência no Pot3:

1. . 0.35 0.3

-- 12 1. 10,4 5 10HΩ

10,4 12. 0.310H. 0.3

104H 10,40.3 120.3 0

0.3 65HΩ

3.1.7. 7º Saída PWM:

Feito todos os ajustes, obtivemos a seguinte saída:

Saída PWM.

Antes de ir para a Ponte-H, o sinal PWM passa pela placa “Conexões”, que dará o sentido de giro do motor, a partir de uma chave.

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3.2. Esquema eletrônico do gerador de sinal PWM:

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3.3 Layout da placa do gerador de Sinal PWM:

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4. Placa Conexões

4.1. Diagrama de Blocos:

Sua função é direcionar o sinal PWM para a Ponte-H, conforme selecionado na Chave Direção, e inibir o pulso para uma direção na qual a chave Fim-de-curso estiver acionada. Desta placa, também saem os leds de indicação do fim de curso.

O Sinal entra pelo conector CN2 passa por uma chave On/Off através do conector CN3, em seguida entra no comum da chave de direção no conector CN4, que por sua vez fará o direcionamento do sinal PWM para esquerda ou direita. O terminal NF das chaves fim-de-curso estão ligadas Vcc, e o terminal NA no GND. Q1 ou Q2 chaveiam conforme o sinal PWM que entra em suas bases se a chave fim-de-curso não estiver acionada, ou seja, C NF Vcc, lembrando que os coletores de Q1 e Q2 estão ligados aos comuns de suas respectivas chaves fim-de-curso. Em contra partida se a chave estiver pressionada, ira conectar o coletor ao GND inibindo o chaveamento do transistor, e juntamente ligando o led de sinalização de fim-de-curso.

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4.2 Esquema Eletrônico da placa de conexões

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4.3. Layout da placa de conexões

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5. Ponte-H:

5.1. Diagrama de Blocos:

A placa “conexões” envia o sinal PWM para a placa “Ponte-H”, lembrando que, Q1 e Q2 nunca são chaveados simultaneamente. Pois assim estaria fechando curto-circuito na fonte, pois Q3 e Q3 chaveariam por conseqüência de Q1 e Q2 estarem chaveados. O Chaveamento é feito na diagonal, Q3 só entra em condução, quando o sinal PWM estiver ALTO em Q2, dando uma direção para a corrente e para o motor. Por outro lado, Q4 só entra em condução se o sinal PWM estiver ALTO em Q1, invertendo o sentido da corrente e do motor também. Os diodos roda-livre D1, D2, D3 e D4 servem para desmagnetizar o motor, evitando danos para os transistores através da corrente reversa, característica indutiva do motor.

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5.2. Esquema eletrônico da Ponte-H

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5.3. Layout da placa da ponte-H

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6. Leitura do encoder, placa Contadores:

6.1. Diagrama de Blocos:

O encoder é uma chave óptica, composta de um led infravermelho e um foto-transistor alinhados de frente um para o outro, com uma pequena distância entre si. Neste pequeno espaço gira um disco perfurado no qual o foto-transistor é chaveado quando a luz do led infravermelho atravessa o furo do disco caracterizando um pulso. Esse pulso é recebido com certo ruído, já que na transição do bloqueio e desbloqueio da luz do led infravermelho, o foto-transistor conduz proporcionalmente a incidência de luz infravermelha, formando assim uma rampa de 0-5v ou 5-0v dependendo do posicionamento do disco. Este sinal aplicado diretamente no contador 74ls90 causa um pulo na contagem binária, já que na transição 5-0v o sinal flutua entre 5v e 0v. Para corrigir este sinal foi adicionada uma porta inversora com schimtt-trigger 74ls14 antes de o sinal entrar no contador. Os contadores estão ligados em cascata, o bit mais significativo vai ligado ao clock do contador seguinte, que no caso será um contador para unidade, um para dezena e um para a centena. O botão reset é um push-button ligado ao +VCC e as entradas de reset de todos os contadores, ou seja, o +VCC é aplicado às entradas de reset quando o botão é pressionado, resetando os mesmos. Conforme o esquema seguinte, R1, R2, R3, C1, Dz1 e Q1, fazem parte de um circuito que fornece um pulso diretamente as portas reset dos contadores quando o circuito é ligado. Garantindo assim o inicio da contagem a partir de zero. Enquanto o carregamento do capacitor C1 não atinge 3,3V, Dz1 não conduz, portanto Q1 está aberto, ligando Vcc para as portas reset através de R2 e R3. Quando Dz1 conduz, Q1 satura, ligando R3 diretamente ao GND, dando condições dos contadores funcionarem normalmente, a partir de zero. Essa transição ocorre em frações de segundo, e apenas uma vez, quando o circuito é ligado. Devido aos ruídos ocorridos no controle do motor, parte analógica do projeto, foi necessário criar outra fonte de alimentação, isolada da fonte simétrica. Já que qualquer ruído presente na entrada do clock resultaria em uma contagem desordenada. Assim, foi adicionada uma fonte na placa contadores exclusivamente para a parte digital.

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6.2. Esquema eletrônico da placa Contadores:

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6.3. Layout da placa Contadores:

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7. Placa Decodificadora/Displays:

7.1. Diagrama de Blocos:

Finalmente, recebendo os dados em binário, os decodificadores 74ls48, convertem para amostragem nos displays (catodo comum). Como já foi mencionado sobre a separação das fontes (analógica/digital), esta placa recebe alimentação da placa contadores. 7.2. Esquema eletrônico da placa Decodificadora/Displays

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7.3. Layout da placa Decodificadora/Displays:

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8. Conclusão:

No desenvolvimento do projeto, nos deparamos com alguns ruídos e problemas não percebidos na teoria. Um deles foi que acabamos tendo de projetar uma nova fonte para parte digital, já que o ruído gerado pelo motor voltava para a fonte e consequentemente iria para no circuito de leitura do encoder. Outro imprevisto, desta vez não por ruído, e sim por característica do foto-transistor do encoder, é que ele tem uma condução proporcional à incidência de luz infravermelha sobre si, deixando o sinal de saída como uma rampa, e esta será mais inclinada, quanto mais lento passar o furo do disco entre o par emissor-receptor. Este infortúnio foi resolvido quando adicionamos um inversor schmitt-trigger 74LS14 antes da entrada de clock do contador de unidades. Transformando essa rampa em um sinal quadrado. Percebemos também um ruído no buffer do offset negativo, o qual não ocorre antes do buffer, e somente em sua saída. No intuito de corrigir esta “falha”, foram adicionados capacitores em paralelo com a alimentação do circuito integrado utilizado, trocado o amplificador do mesmo circuito integrado, trocado o próprio circuito integrado, e o problema persistiu no protoboard. Imaginou-se que este ruído poderia vir do protoboard, então foi desenvolvida a PCI do circuito, e o problema persistiu, após várias análises, juntamente com o professor, constatou-se que este ruído não interferia no funcionamento do conjunto, e acabou sendo “ignorado”. Este projeto foi muito importante para fixar todos os conhecimentos obtidos em teoria na sala, bem como um incentivo e para mostrar que a prática é muito diferente da teoria. Pois na teoria, todos componentes são “ideais” e não há nenhum ruído ou falha de fabricação, tudo funciona perfeitamente. E na prática, foi possível observar com clareza essa diferença.

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9. Imagens do desenvolvimento do projeto:

Foto 1 - Gerador PWM no protoboard

Foto 2 - PWM ligado na Ponte-H

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Foto 3 - Tirando fotos das formas de onda diretamente do osciloscópio digital

Foto 4 - Testes iniciais em protótipos com contadores e decodificadores

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Foto 5 - Contadores no protoboard, os leds indicam o valor em binário

Foto 6 - Teste final com a implementação do 74ls14 no sinal do encoder

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Foto 7 - Testes eletrônica + mecânica

Foto 8 - Estrutura completa

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Foto 9 - Ensaios com a fonte simétrica (analógica)

Foto 10 - Circuito impresso em papel especial pronto para transferir para placa (PCI Contadores)

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Foto 11 - Furação da PCI, após sucesso na transferência

Foto 12 - Furação concluída

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Foto 13 - Inicio da corrosão em solução de ácido muriático

Foto 14 - Nota-se em verde, o óxido de cobre, resíduo da reação

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Foto 15 - Placa corroída

Foto 16 - Testes finais

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Foto 17 - Estrutura Previamente projetada em SolidWorks

Foto 18 - Estrutura Mecânica Concluída

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Foto 19 - Placa Contador face componentes (Final)

Foto 20 - Placa Contador Face das Trilhas (Final)

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Foto 21 - Placa Decodificadora/Displays face dos Componentes (Final)

Foto 22 - Placa Decodificadora/Displays face das trilhas (Final)

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10. Datasheets dos Componentes Utilizados:

A partir desta pagina estão todos os datasheets dos componentes utilizados para o desenvolvimento do projeto que nos foi proposto.

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1N4001-1N

4007

1N4001-1N4007, Rev. C 2001 Fairchild Semiconductor Corporation

1N4001 - 1N4007

General Purpose Rectifiers (Glass Passivated)

Absolute Maximum Ratings* TA = 25°C unless otherwise noted

*These ratings are limiting values above which the serviceability of any semiconductor device may be impaired.

Electrical Characteristics TA = 25°C unless otherwise noted

Features• Low forward voltage drop.

• High surge current capability.

Symbol

Parameter

Device

Units 4001 4002 4003 4004 4005 4006 4007

VF Forward Voltage @ 1.0 A 1.1 V Irr Maximum Full Load Reverse Current, Full

Cycle TA = 75°C 30 µA

IR Reverse Current @ rated VR TA = 25°C TA = 100°C

5.0 500

µA µA

CT Total Capacitance VR = 4.0 V, f = 1.0 MHz

15 pF

DO-41COLOR BAND DENOTES CATHODE

Symbol

Parameter

Value

Units 4001 4002 4003 4004 4005 4006 4007

VRRM Peak Repetitive Reverse Voltage 50 100 200 400 600 800 1000 V IF(AV) Average Rectified Forward Current,

.375 " lead length @ TA = 75°C 1.0 A

IFSM Non-repetitive Peak Forward Surge Current

8.3 ms Single Half-Sine-Wave 30 A

Tstg Storage Temperature Range -55 to +175 °C TJ Operating Junction Temperature -55 to +175 °C

Symbol

Parameter

Value

Units PD Power Dissipation 3.0 W RθJA Thermal Resistance, Junction to Ambient 50 °C/W

Thermal Characteristics

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1N4001-1N

4007

1N4001-1N4007, Rev. C 2001 Fairchild Semiconductor Corporation

General Purpose Rectifiers (Glass Passivated)(continued)

Typical Characteristics

0.6 0.8 1 1.2 1.40.010.020.04

0.10.20.4

124

1020

Forward Voltage, VF [V]

Forw

ard

Cur

rent

, IF [

A]

T = 25 C Pulse Width = 300µµµµS2% Duty Cycle

ºJ

1 2 4 6 8 10 20 40 60 1000

6

12

18

24

30

Number of Cycles at 60Hz

Peak

For

war

d Su

rge

Cur

rent

, IFS

M [A

]

0 20 40 60 80 100 120 140 160 1800

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

Ambient Temperature [ºC]Ave

rage

Rec

tifie

d Fo

rwar

d C

urre

nt, I

F [A

]

SINGLE PHASE HALF WAVE

60HZRESISTIVE OR

INDUCTIVE LOAD.375" 9.0 mm LEAD

LENGTHS

0 20 40 60 80 100 120 1400.01

0.1

1

10

100

1000

Percent of Rated Peak Reverse Voltage [%]

Reve

rse

Curr

ent,

I R [m

A]

T = 25 CºJ

T = 150 CºJ

T = 100 CºJ

Figure 1. Forward Current Derating Curve Figure 2. Forward Voltage Characteristics

Figure 3. Non-Repetitive Surge Current Figure 4. Reverse Current vs Reverse Voltage

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DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHERNOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILDDOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCTOR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENTRIGHTS, NOR THE RIGHTS OF OTHERS.

TRADEMARKSThe following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and isnot intended to be an exhaustive list of all such trademarks.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORTDEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.As used herein:1. Life support devices or systems are devices orsystems which, (a) are intended for surgical implant intothe body, or (b) support or sustain life, or (c) whosefailure to perform when properly used in accordancewith instructions for use provided in the labeling, can bereasonably expected to result in significant injury to theuser.

2. A critical component is any component of a lifesupport device or system whose failure to perform canbe reasonably expected to cause the failure of the lifesupport device or system, or to affect its safety oreffectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Obsolete

This datasheet contains the design specifications forproduct development. Specifications may change inany manner without notice.

This datasheet contains preliminary data, andsupplementary data will be published at a later date.Fairchild Semiconductor reserves the right to makechanges at any time without notice in order to improvedesign.

This datasheet contains final specifications. FairchildSemiconductor reserves the right to make changes atany time without notice in order to improve design.

This datasheet contains specifications on a productthat has been discontinued by Fairchild semiconductor.The datasheet is printed for reference information only.

Formative orIn Design

First Production

Full Production

Not In Production

OPTOLOGIC™OPTOPLANAR™PACMAN™POP™Power247™PowerTrenchQFET™QS™QT Optoelectronics™Quiet Series™SILENT SWITCHER

FASTFASTr™FRFET™GlobalOptoisolator™GTO™HiSeC™ISOPLANAR™LittleFET™MicroFET™MicroPak™MICROWIRE™

Rev. H4

ACEx™Bottomless™CoolFET™CROSSVOLT™DenseTrench™DOME™EcoSPARK™E2CMOSTM

EnSignaTM

FACT™FACT Quiet Series™

SMART START™STAR*POWER™Stealth™SuperSOT™-3SuperSOT™-6SuperSOT™-8SyncFET™TinyLogic™TruTranslation™UHC™UltraFET

STAR*POWER is used under license

VCX™

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This datasheet has been download from:

www.datasheetcatalog.com

Datasheets for electronics components.

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1N5400-1N

5408

1N5400-1N5408, Rev. C 2001 Fairchild Semiconductor Corporation

1N5400 - 1N5408

General Purpose RectifiersAbsolute Maximum Ratings* TA = 25°C unless otherwise noted

*These ratings are limiting values above which the serviceability of any semiconductor device may be impaired.

Electrical Characteristics TA = 25°C unless otherwise noted

Features• 3.0 ampere operation at TA = 75°C

with no thermal runaway.

• High current capability.

• Low leakage. DO-201ADCOLOR BAND DENOTES CATHODE

Symbol Parameter Device Units 5400 5401 5402 5403 5404 5405 5406 5407 5408

VF Forward Voltage @ 3.0 A 1.2 V Irr Maximum Full Load Reverse

Current, Full Cycle TA = 105°C

0.5

mA IR Reverse Current @ rated VR

TA = 25°C TA = 100°C

5.0 500

µA µA

CT Toatal Capacitance VR = 4.0 V, f = 1.0 MHz 30 pF

Symbol Parameter Value Units 5400 5401 5402 5403 5404 5405 5406 5407 5408

VRRM Maximum Repetitive Reverse Voltage

50 100 200 300 400 500 600 800 1000 V

IF(AV) Average Rectified Forward Current, .375 " lead length @ TA = 75°C

3.0 A

IFSM Non-repetitive Peak Forward Surge Current

8.3 ms Single Half-Sine-Wave

200

A

Tstg Storage Temperature Range -55 to +150 °C TJ Operating Junction Temperature -55 to +150 °C

Symbol

Parameter

Value

Units PD Power Dissipation 6.25 W RθJA Thermal Resistance, Junction to Ambient 20 °C/W

Thermal Characteristics

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1N5400-1N

5408

1N5400-1N5408, Rev. C 2001 Fairchild Semiconductor Corporation

General Purpose Rectifiers(continued)

Typical Characteristics

25 50 75 100 125 150 175 2000

1

2

3

4

Ambient Temperature [ºC]Ave

rage

Rec

tifie

d Fo

rwar

d C

urre

nt, I

F [A

]

9.5mm LEAD LENGTH

0.4 0.6 0.8 1 1.2 1.4 1.6 1.80.01

0.1

1

510

100

Forward Voltage, VF [V]

Forw

ard

Cur

rent

, IF [

A]

Pulse Width = 200µµµµS 1% Duty Cycle

T = 25 C ºJ

0.1 1 5 10 50 1001

5

10

50

100

Reverse Voltage, VR [V]

Tota

l Cap

acita

nce,

CT

[pF]

1 2 5 10 20 50 1000

40

80

120

160

200

Number of Cycles at 60Hz

Peak

For

war

d Su

rge

Cur

rent

, IFS

M [A

]

T = 105 C ºA

0 20 40 60 80 100 120 1400.1

1

10

100

Percent of Rated Peak Reverse Voltage [%]

Reve

rse

Curr

ent,

I R [m

A]

T = 25 C ºA

Figure 1. Forward Current Derating CurveFigure 2. Forward Voltage Characteristics

Figure 3. Non-Repetitive Surge Current Figure 4. Reverse Current vs Reverse Voltage

Figure 5. Total Capacitance

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DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHERNOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILDDOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCTOR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENTRIGHTS, NOR THE RIGHTS OF OTHERS.

TRADEMARKSThe following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and isnot intended to be an exhaustive list of all such trademarks.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORTDEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.As used herein:1. Life support devices or systems are devices orsystems which, (a) are intended for surgical implant intothe body, or (b) support or sustain life, or (c) whosefailure to perform when properly used in accordancewith instructions for use provided in the labeling, can bereasonably expected to result in significant injury to theuser.

2. A critical component is any component of a lifesupport device or system whose failure to perform canbe reasonably expected to cause the failure of the lifesupport device or system, or to affect its safety oreffectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Obsolete

This datasheet contains the design specifications forproduct development. Specifications may change inany manner without notice.

This datasheet contains preliminary data, andsupplementary data will be published at a later date.Fairchild Semiconductor reserves the right to makechanges at any time without notice in order to improvedesign.

This datasheet contains final specifications. FairchildSemiconductor reserves the right to make changes atany time without notice in order to improve design.

This datasheet contains specifications on a productthat has been discontinued by Fairchild semiconductor.The datasheet is printed for reference information only.

Formative orIn Design

First Production

Full Production

Not In Production

OPTOLOGIC™OPTOPLANAR™PACMAN™POP™Power247™PowerTrenchQFET™QS™QT Optoelectronics™Quiet Series™SILENT SWITCHER

FASTFASTr™FRFET™GlobalOptoisolator™GTO™HiSeC™ISOPLANAR™LittleFET™MicroFET™MicroPak™MICROWIRE™

Rev. H4

ACEx™Bottomless™CoolFET™CROSSVOLT™DenseTrench™DOME™EcoSPARK™E2CMOSTM

EnSignaTM

FACT™FACT Quiet Series™

SMART START™STAR*POWER™Stealth™SuperSOT™-3SuperSOT™-6SuperSOT™-8SyncFET™TinyLogic™TruTranslation™UHC™UltraFET

STAR*POWER is used under license

VCX™

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This datasheet has been download from:

www.datasheetcatalog.com

Datasheets for electronics components.

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Zeners (BZX55C

3V3 - BZX55C

33)

BZX55 Series Rev. C 2001 Fairchild Semiconductor Corporation

Absolute Maximum Ratings* TA = 25°C unless otherwise noted Tolerance: C = 5%

Electrical Characteristics TA = 25°C unless otherwise noted

@

NOTES:1) These ratings are based on a maximum junction temperature of 200 degrees C.2) These are steady state limits. The factory should be consulted on applications involving pulsed or low duty cycle operations.

*These ratings are limiting values above which the serviceability of the diode may be impaired.**Non-recurrent square wave PW= 8.3 ms, TA= 50 degrees C.

@ @@

ZenersBZX55C 3V3 - BZX55C 33

Symbol

Parameter

Value

Units PD Power Dissipation 500 mW TSTG Storage Temperature Range -65 to +200 °C TJ Maximum Junction Operating Temperature + 200 °C Lead Temperature (1/16” from case for 10

seconds) + 230 °C

Surge Power** 30 W

VZ(V) IR2(µµµµA) VR(V) Device MIN MAX

ZZ(ΩΩΩΩ) IZ(mA) ZZK(ΩΩΩΩ) IZK(mA) IR1(µµµµA) VR(V) TA= 150°°°°C

TC (%/°°°°C)

IZRM (mA)

BZX55C 3V3 BZX55C 3V6 BZX55C 3V9 BZX55C 4V3 BZX55C 4V7

3.1 3.4 3.7 4.0 4.4

3.5 3.8 4.1 4.6 5.0

85 85 85 75 60

5.0 5.0 5.0 5.0 5.0

600 600 600 600 600

1.0 1.0 1.0 1.0 1.0

2.0 2.0 2.0 1.0 0.5

1.0 1.0 1.0 1.0 1.0

40 40 40 20 10

1.0 1.0 1.0 1.0 1.0

- 0.060 - 0.055 - 0.050 - 0.040 - 0.020

115 105 95 90 85

BZX55C 5V1 BZX55C 5V6 BZX55C 6V2 BZX55C 6V8 BZX55C 7V5

4.8 5.2 5.8 6.4 7.0

5.4 6.0 6.6 7.2 7.9

35 25 10 8.0 7.0

5.0 5.0 5.0 5.0 5.0

550 450 200 150 50

1.0 1.0 1.0 1.0 1.0

0.1 0.1 0.1 0.1 0.1

1.0 1.0 2.0 3.0 5.0

2.0 2.0 2.0 2.0 2.0

1.0 1.0 2.0 3.0 5.0

+0.010 +0.025 +0.032 +0.040 +0.045

80 70 64 58 53

BZX55C 8V2 BZX55C 9V1 BZX55C 10 BZX55C 11 BZX55C 12

7.7 8.5 9.4

10.4 11.4

8.7 9.6 10.6 11.6 12.7

7.0 10 15 20 20

5.0 5.0 5.0 5.0 5.0

50 50 70 70 90

1.0 1.0 1.0 1.0 1.0

0.1 0.1 0.1 0.1 0.1

6.2 6.8 7.5 8.2 9.1

2.0 2.0 2.0 2.0 2.0

6.2 6.8 7.5 8.2 9.1

+0.048 +0.050 +0.055 +0.060 +0.065

47 43 40 36 32

BZX55C 13 BZX55C 15 BZX55C 16 BZX55C 18 BZX55C 20

12.4 13.8 15.3 16.8 18.8

14.1 15.6 17.1 19.1 21.1

26 30 40 50 55

5.0 5.0 5.0 5.0 5.0

110 110 170 170 220

1.0 1.0 1.0 1.0 1.0

0.1 0.1 0.1 0.1 0.1

10 11 12 13 15

2.0 2.0 2.0 2.0 2.0

10 11 12 13 15

0.070 0.070 0.075 0.075 0.080

29 27 24 21 20

BZX55C 22 BZX55C 24 BZX55C 27 BZX55C 30 BZX55C 33

20.8 22.8 25.1 28.0 31.0

23.3 25.6 28.9 32.0 35.0

55 80 80 80 80

5.0 5.0 5.0 5.0 5.0

220 220 220 220 220

1.0 1.0 1.0 1.0 1.0

0.1 0.1 0.1 0.1 0.1

16 18 20 22 24

2.0 2.0 2.0 2.0 2.0

16 18 20 22 24

0.080 0.080 0.085 0.085 0.085

18 16 14 13 12

VF Foward Voltage = 1.0 V Maximum @ IF = 100 mA for all BZX 55 series

DO-35COLOR BAND DENOTES CATHODE

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Zeners (BZX55C

3V3 - BZX55C

33)

BZX55 series Rev. C 2001 Fairchild Semiconductor Corporation

Typical Characteristics

0.1 0.2 0.5 1 2 5 10 2012

51020

50100200

50010002000

5000

I - ZENER CURRENT (mA)

Z -

IMP

ED

AN

CE

(oh

ms)

T = 25 C ºA

Z

Z

V = 3.3V Z

V = 5.1V Z

V = 12.0V Z

V = 33.0V Z

1 2 5 10 20 301

2

3

4

5

I - ZENER CURRENT (mA)

V

- ZE

NE

R V

OLT

AG

E (

V)

T = -25 C ºA

Z

Z

V = 3.3V Z

T = 85 C ºA T = 100 C ºA

T = 25 C ºA

T = 125 C ºA

1 2 5 10 20 30

5

10

15

20

25

30

35

I - ZENER CURRENT (mA)

V

- ZE

NE

R V

OLT

AG

E (

V)

T = 25 C ºA

Z

Z

V = 12.0V Z

V = 3.3V Z V = 5.1V Z

V = 33.0V Z

1 2 5 10 20 304

4.5

5

5.5

6

I - ZENER CURRENT (mA)

V

- ZE

NE

R V

OLT

AG

E (

V)

T = -25 C ºA

Z

Z

V = 5.1V Z

T = 85 C ºA

T = 100 C ºA

T = 25 C ºA

T = 125 C ºA

1 2 5 10 20 300

5

10

15

I - ZENER CURRENT (mA)

V

- ZE

NE

R V

OLT

AG

E (

V)

T = -25 C ºA

Z

Z

V = 12.0V Z

T = 85 C ºA T = 100 C ºA T = 25 C ºA

T = 125 C ºA

1 2 5 10 20 3020

25

30

35

40

I - ZENER CURRENT (mA)

V

- ZE

NE

R V

OLT

AG

E (

V)

T = -25 C ºA

Z

Z

V = 33.0V Z

T = 85 C ºA

T = 100 C ºA

T = 25 C ºA

T = 125 C ºA

Zener Current vs. Zener Voltage Zener Current vs. Zener Impedence

3.3 Zener Voltage vs. Temperature 5.1 Zener Voltage vs. Temperature

12 Zener Voltage vs. Zener Temperature 33 Zener Voltage vs. Zener Temperature

Zeners (BZX55C 3V3 - BZX55C 33)(continued)

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DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHERNOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILDDOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCTOR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENTRIGHTS, NOR THE RIGHTS OF OTHERS.

TRADEMARKSThe following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and isnot intended to be an exhaustive list of all such trademarks.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORTDEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.As used herein:1. Life support devices or systems are devices orsystems which, (a) are intended for surgical implant intothe body, or (b) support or sustain life, or (c) whosefailure to perform when properly used in accordancewith instructions for use provided in the labeling, can bereasonably expected to result in significant injury to theuser.

2. A critical component is any component of a lifesupport device or system whose failure to perform canbe reasonably expected to cause the failure of the lifesupport device or system, or to affect its safety oreffectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Obsolete

This datasheet contains the design specifications forproduct development. Specifications may change inany manner without notice.

This datasheet contains preliminary data, andsupplementary data will be published at a later date.Fairchild Semiconductor reserves the right to makechanges at any time without notice in order to improvedesign.

This datasheet contains final specifications. FairchildSemiconductor reserves the right to make changes atany time without notice in order to improve design.

This datasheet contains specifications on a productthat has been discontinued by Fairchild semiconductor.The datasheet is printed for reference information only.

Formative orIn Design

First Production

Full Production

Not In Production

OPTOLOGIC™OPTOPLANAR™PACMAN™POP™Power247™PowerTrenchQFET™QS™QT Optoelectronics™Quiet Series™SILENT SWITCHER

FASTFASTr™FRFET™GlobalOptoisolator™GTO™HiSeC™ISOPLANAR™LittleFET™MicroFET™MicroPak™MICROWIRE™

Rev. H4

ACEx™Bottomless™CoolFET™CROSSVOLT™DenseTrench™DOME™EcoSPARK™E2CMOSTM

EnSignaTM

FACT™FACT Quiet Series™

SMART START™STAR*POWER™Stealth™SuperSOT™-3SuperSOT™-6SuperSOT™-8SyncFET™TinyLogic™TruTranslation™UHC™UltraFET

STAR*POWER is used under license

VCX™

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This datasheet has been download from:

www.datasheetcatalog.com

Datasheets for electronics components.

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©2001 Fairchild Semiconductor Corporation

www.fairchildsemi.com

Rev. 1.0.0

Features• Output Current In Excess of 1. 5A• Output Adjustable Between 1. 2V and 37V• Internal Thermal Overload Protection• Internal Short Circuit Current Limiting• Output Transistor Safe Operating Area Compensation• TO-220 Package

DescriptionThis monolithic integrated circuit is an adjustable 3-terminalpositive voltage regulator designed to supply more than 1.5Aof load current with an output voltage adjustable over a 1.2to 37V. It employs internal current limiting, thermal shut-down and safe area compensation.

TO-220

1. Adj 2. Output 3. Input

1

Internal Block Diagram

Rlimit

3Vin

Vo

1

VoltageReference

Vadj

2

ProtectionCircuitry

+

-

Input

Output

Adj

LM3173-Terminal Positive Adjustable Regulator

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LM317

2

Absolute Maximum Ratings

Electrical Characteristics(VI-VO=5V, IO= 0.5A, 0°C ≤ TJ ≤ + 125°C, IMAX = 1.5A, PDMAX = 20W, unless otherwise specified)

Note:1. Load and line regulation are specified at constant junction temperature. Change in VD due to heating effects must be taken

into account separately. Pulse testing with low duty is used. (PMAX = 20W)2. CADJ, when used, is connected between the adjustment pin and ground.

Parameter Symbol Value UnitInput-Output Voltage Differential VI - VO 40 VLead Temperature TLEAD 230 °CPower Dissipation PD Internally limited WOperating Junction Temperature Range Tj 0 ~ +125 °CStorage Temperature Range TSTG -65 ~+125 °CTemperature Coefficient of Output Voltage ∆Vo/∆T ±0.02 %/°C

Parameter Symbol Conditions Min Typ. Max. Unit

Line Regulation (Note1) Rline TA = +25°C3V ≤ VI - VO ≤ 40V - 0.01 0.04 % / V

3V ≤ VI - VO ≤ 40V - 0.02 0.07 % / V

Load Regulation (Note1) Rload

TA = +25°C, 10mA ≤ IO ≤ IMAXVO< 5VVO ≥ 5V

- 180.4

250.5

mV% / VO

10mA ≤ IO ≤ IMAXVO < 5VVO ≥ 5V

- 400.8

701.5

mV% / VO

Adjustable Pin Current IADJ - - 46 100 µA

Adjustable Pin Current Change ∆IADJ3V ≤ VI - VO ≤ 40V10mA ≤ IO ≤ IMAX PD ≤ PMAX

- 2.0 5 µA

Reference Voltage VREF3V ≤ VIN - VO ≤ 40V10mA ≤ IO ≤ IMAXPD ≤ PMAX

1.20 1.25 1.30 V

Temperature Stability STT - - 0.7 - % / VOMinimum Load Current to Maintain Regulation IL(MIN) VI - VO = 40V - 3.5 12 mA

Maximum Output Current IO(MAX)VI - VO ≤ 15V, PD ≤ PMAXVI - VO ≤ 40V, PD ≤ PMAX TA=25°C

1.0 2.20.3 - A

RMS Noise, % of VOUT eN TA= +25°C, 10Hz ≤ f ≤ 10KHz - 0.003 0.01 % / VO

Ripple Rejection RRVO = 10V, f = 120Hzwithout CADJCADJ = 10µF (Note2)

66 6075

- dB

Long-Term Stability, TJ = THIGH ST TA = +25°C for end pointmeasurements, 1000HR - 0.3 1 %

Thermal Resistance Junction to Case RθJC - - 5 - °C / W

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LM317

3

Typical Perfomance Characteristics

Figure 1. Load Regulation

Figure 3. Dropout Voltage

Figure 2. Adjustment Current

Figure 4. Reference Voltage

TEMPERATURE (°C)

OU

TPU

T VO

LTAG

E D

EVIA

TIO

N(%

)

TEMPERATURE (°C)

INPU

T-O

UTP

UT

DIF

FER

ENTI

AL(V

)

TEMPERATURE (°C)

ADJU

STM

ENT

CU

RR

ENT(

uA)

TEMPERATURE (°C)

REF

EREN

CE

VOLT

AGE(

V)

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LM317

4

Typical Application

Figure 5. Programmable Regulator

Ci is required when regulator is located an appreciable distance from power supply filter. Co is not needed for stability, however, it does improve transient response. Since IADJ is controlled to less than 100µA, the error associated with this term is negligible in most applications.

VI KA317

Ci0. 1µµµµF

VI VoVadj

R2

Iadj

VO = 1.25V (1+ R2/ R1)+Iadj R2

R1

Iadj

Co1µµµµF

InputOutputLM317

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LM317

5

Mechanical DimensionsPackage

4.50 ±0.209.90 ±0.20

1.52 ±0.10

0.80 ±0.102.40 ±0.20

10.00 ±0.20

1.27 ±0.10

ø3.60 ±0.10

(8.70)

2.80

±0.

1015

.90

±0.2

0

10.0

8 ±0

.30

18.9

5MA

X.

(1.7

0)

(3.7

0)(3

.00)

(1.4

6)

(1.0

0)

(45°)

9.20

±0.

2013

.08

±0.2

0

1.30

±0.

10

1.30+0.10–0.05

0.50+0.10–0.05

2.54TYP[2.54 ±0.20]

2.54TYP[2.54 ±0.20]

TO-220

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LM317

6

Ordering InformationProduct Number Package Operating Temperature

LM317T TO-220 0°C to + 125°C

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LM317

7

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LM317

6/1/01 0.0m 001Stock#DSxxxxxxxx

2001 Fairchild Semiconductor Corporation

LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.

2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

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This datasheet has been download from:

www.datasheetcatalog.com

Datasheets for electronics components.

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©2001 Fairchild Semiconductor Corporation

www.fairchildsemi.com

Rev. 1.0.0

Features• Output current in excess of 1.5A• Output voltage adjustable between -1.2V and - 37V• Internal thermal overload protection• Internal short circuit current limiting• Output transistor safe area compensation• Floating operation for high voltage applications • Standard 3-pin TO-220 package

DescriptionThe LM337 is a 3-terminal negative adjustable regulator. Itsupplies in excess of 1.5A over an output voltage range of -1.2V to - 37V. This regulator requires only two externalresistor to set the output voltage. Included on the chip arecurrent limiting, thermal overload protection and safe areacompensation.

TO-220

1. Adj 2. Input 3. Output

1

Internal Block Diagram

1

VoltageReference

-

+

2

ProtectionCircuitry

3 Output

Input

Vadj

LM3373-Terminal 1.5A Negative Adjustable Regulator

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LM337

2

Absolute Maximum Ratings

Electrical Characteristics(VI - VO = 5V, IO = 40mA, 0°C ≤ TJ ≤ +125°C, PDMAX = 20W, unless otherwise specified)

Note:1. Load and line regulation are specified at constant junction temperature. Change in VO due to heating effects must be taken into

account separately. Pulse testing with low duty is used.2. CADJ, when used, is connected detween the adjustment pin and ground.

Parameter Symbol Value UnitInput-Output Voltage Differential |VI - VO| 40 VPower Dissipation PD Internally limited WOperating Temperature Range TOPR 0 ~ +125 °CStorage Temperature Range TSTG -65 ~+125 °C

Parameter Symbol Conditions Min Typ. Max. Unit

Line Regulation (Note1) Rline

TA = +25°C3V ≤ I VI - VO I ≤ 40V - 0.01 0.04 %/ V3V ≤ I VI - VO I ≤ 40V - 0.02 0.07

Load Regulation (Note1) RloadTA = +25°C10mA ≤ IO ≤ 0.5A

- 15 50mV

10mA ≤ IO ≤ 1.5A - 15 150Adjustable Pin Current IADJ - - 50 100 µA

Adjustable Pin Current Change ∆IADJTA =+ 25°C10mA ≤ IO ≤ 1.5A3V ≤I VI - VO I ≤ 40V

- 2 5 µA

TA =+ 25°C -1.213 -1.250 -1.287Reference Voltage VREF 3V ≤ I VI - VO I ≤ 40V

10mA ≤ IO ≤ 1.5A -1.200 -1.250 -1.300 V

Temperature Stability STT 0°C ≤ ΤJ ≤ +125°C - 0.6 - %Minimum Load Current to Maintain Regulation IL(MIN)

3V ≤I VI - VO I ≤ 40V - 2.5 103V ≤I VI - VO I ≤ 10V - 1.5 6 mA

Output Noise eN TA =+25°C 10Hz ≤ f ≤10KHz - 0.003 - V/106

Ripple Rejection Ratio RRVO = -10V, f = 120Hz - 60 -CADJ = 10µF (Note2) 66 77 - dB

Long Term Stability ST TJ = 125°C ,1000Hours - 0.3 1 %Thermal Resistance Junction to Case RθJC - - 4 - °C/ W

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LM337

3

Typical Application

Figure 1. Programmable Regulator

• Ci is required if regulator is located more then 4 inches from power supply filter. A 1.0µF solid tantalum or 10µF aluminum electrolytic is recommended. Co is necessary for stability. A 1.0µF solid tantalum or 10µF aluminum electrolytic is recommended.

• VO= -1.25V (1+R2/R1)

-VI KA337

Ci0. 1µµµµF

VI VoVadj

R2

Iadj R1

IPROG

Co1µµµµF

-Vo

+ +

LM337

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LM337

4

Mechanical DimensionsPackage

4.50 ±0.209.90 ±0.20

1.52 ±0.10

0.80 ±0.102.40 ±0.20

10.00 ±0.20

1.27 ±0.10

ø3.60 ±0.10

(8.70)

2.80

±0.

1015

.90

±0.2

0

10.0

8 ±0

.30

18.9

5MA

X.

(1.7

0)

(3.7

0)(3

.00)

(1.4

6)

(1.0

0)

(45°)

9.20

±0.

2013

.08

±0.2

0

1.30

±0.

10

1.30+0.10–0.05

0.50+0.10–0.05

2.54TYP[2.54 ±0.20]

2.54TYP[2.54 ±0.20]

TO-220

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LM337

5

Ordering InformationProduct Number Package Operating Temperature

LM337T TO-220 0°C to + 125°C

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LM337

6/1/01 0.0m 001Stock#DSxxxxxxxx

2001 Fairchild Semiconductor Corporation

LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.

2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

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This datasheet has been download from:

www.datasheetcatalog.com

Datasheets for electronics components.

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©2002 Fairchild Semiconductor Corporation

www.fairchildsemi.com

Rev. 1.0.3

Features• Internally Frequency Compensated for Unity Gain• Large DC Voltage Gain: 100dB• Wide Power Supply Range:

LM224/LM224A, LM324/LM324A : 3V~32V (or ±1.5 ~ 15V)LM2902: 3V~26V (or ±1.5V ~ 13V)

• Input Common Mode Voltage Range Includes Ground• Large Output Voltage Swing: 0V to VCC -1.5V • Power Drain Suitable for Battery Operation

DescriptionThe LM324/LM324A,LM2902,LM224/LM224A consist offour independent, high gain, internally frequency compensated operational amplifiers which were designedspecifically to operate from a single power supply over awide voltage range. Operation from split power supplies isalso possible so long as the difference between the two supplies is 3 volts to 32 volts. Application areas includetransducer amplifier, DC gain blocks and all the conventional OP-AMP circuits which now can be easilyimplemented in single power supply systems.

14-SOP

14-DIP

1

1

Internal Block Diagram

1

2

3

4

5

6

7 8

9

10

11

12

13

14

1

2 3

4

+

_

+

+ + _

_ _

OUT4

GND

OUT2

OUT1

OUT3

IN4 (-)

IN3 (-)

IN4 (+)

IN3 (+)

IN1 (-)

IN1 (+)

IN2 (+)

IN2 (-)

VCC

LM2902,LM324/LM324A,LM224/LM224AQuad Operational Amplifier

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LM2902,LM324/LM324A,LM224/LM224A

2

Schematic Diagram(One Section Only)

Absolute Maximum Ratings

Thermal Data

Parameter Symbol LM224/LM224A LM324/LM324A LM2902 UnitPower Supply Voltage VCC ±16 or 32 ±16 or 32 ±13 or 26 VDifferential Input Voltage VI(DIFF) 32 32 26 VInput Voltage VI -0.3 to +32 -0.3 to +32 -0.3 to +26 VOutput Short Circuit to GNDVcc≤15V, TA=25°C(one Amp) - Continuous Continuous Continuous -

Power Dissipation, TA=25°C14-DIP14-SOP

PD 1310640

1310640

1310640

mW

Operating Temperature Range TOPR -25 ~ +85 0 ~ +70 -40 ~ +85 °CStorage Temperature Range TSTG -65 ~ +150 -65 ~ +150 -65 ~ +150 °C

Parameter Symbol Value UnitThermal Resistance Junction-Ambient Max.14-DIP14-SOP

Rθja 95195

°C/W

Q8

Q7

Q6Q5

Q4

Q3Q2

Q1

Q9

Q10

Q11

Q12

Q14

Q15

Q16

Q18

Q19

Q20

R2

Q21

C1R1

GND

OUTPUTIN(+)

IN(-)

VCC

Q13

Q17

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LM2902,LM324/LM324A,LM224/LM224A

3

Electrical Characteristics (VCC = 5.0V, VEE = GND, TA = 25 °C, unless otherwise specified)

Note :1. VCC=30V for LM224 and LM324 , VCC = 26V for LM2902

Parameter Symbol ConditionsLM224 LM324 LM2902

UnitMin. Typ. Max. Min. Typ. Max. Min. Typ. Max.

Input Offset Voltage VIO

VCM = 0V to VCC -1.5VVO(P) = 1.4V, RS = 0Ω

- 1.5 5.0 - 1.5 7.0 - 1.5 7.0 mV

Input Offset Current IIO - - 2.0 30 - 3.0 50 - 3.0 50 nA

Input Bias Current IBIAS - - 40 150 - 40 250 - 40 250 nA Common-Mode InputVoltage Range

VI(R) Note1 0 - VCC-1.5 0

VCC-1.5 - 0 -

VCC-1.5 V

Supply Current ICC

RL = ∞,VCC = 30V (all Amps) - 1.0 3 - 1.0 3 - 1.0 3 mA

RL = ∞,VCC = 5V (all Amps)(VCC = 26V for LM2902)

- 0.7 1.2 - 0.7 1.2 - 0.7 1.2 mA

Large SignalVoltage Gain GV

VCC = 15V,RL≥2KΩVO(P) = 1V to 11V 50 100 - 25 100 - - 100 - V/

mV

Output Voltage Swing

VO(H) Note1

RL = 2KΩ 26 - - 26 - - 22 - - V

RL = 10KΩ 27 28 - 27 28 - 23 24 - V

VO(L) VCC = 5V,RL≥10KΩ - 5 20 - 5 20 - 5 100 mVCommon-ModeRejection Ratio CMRR - 70 85 - 65 75 - 50 75 - dB

Power SupplyRejection Ratio PSRR - 65 100 - 65 100 - 50 100 - dB

Channel Separation CS f = 1KHz to 20KHz - 120 - - 120 - - 120 - dB

Short Circuit to GND ISC - - 40 60 - 40 60 - 40 60 mA

Output Current

ISOURCEVI(+) = 1V, VI(-) = 0VVCC = 15V, VO(P) = 2V

20 40 - 20 40 - 20 40 - mA

ISINK

VI(+) = 0V, VI(-) = 1VVCC = 15V, VO(P) = 2V

10 13 - 10 13 - 10 13 - mA

VI(+) = 0V, VI(-) = 1VVCC = 15V,VO(R) = 200mV

12 45 - 12 45 - - - - µA

Differential InputVoltage VI(DIFF) - - - VCC - - VCC - - VCC V

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LM2902,LM324/LM324A,LM224/LM224A

4

Electrical Characteristics (Continued)

(VCC = 5.0V, VEE = GND, unless otherwise specified)The following specification apply over the range of -25°C ≤ TA ≤ + 85°C for the LM224; and the 0°C ≤ TA ≤ +70°C for the LM324 ; and the - 40°C ≤ TA ≤ +85°C for the LM2902

Note:1. VCC=30V for LM224 and LM324 , VCC = 26V for LM2902

Parameter Symbol ConditionsLM224 LM324 LM2902

UnitMin. Typ. Max. Min. Typ. Max. Min. Typ. Max.

Input Offset Voltage VIO

VICM = 0V to VCC -1.5VVO(P) = 1.4V, RS = 0Ω

- - 7.0 - - 9.0 - - 10.0 mV

Input Offset VoltageDrift ∆VIO/∆T - - 7.0 - - 7.0 - - 7.0 - µV/°C

Input Offset Current IIO - - - 100 - - 150 - - 200 nAInput Offset CurrentDrift ∆IIO/∆T - - 10 - - 10 - - 10 - pA/°C

Input Bias Current IBIAS - - - 300 - - 500 - - 500 nA Common-Mode Input Voltage Range VI(R) Note1 0 - VCC

-2.0 0 - VCC-2.0 0 - VCC

-2.0 V

Large Signal VoltageGain GV

VCC = 15V, RL ≥ 2.0KΩVO(P) = 1V to 11V

25 - - 15 - - 15 - - V/mV

Output Voltage Swing

VO(H) Note1

RL = 2KΩ 26 - - 26 - - 22 - - V

RL = 10KΩ 27 28 - 27 28 - 23 24 - V

VO(L)VCC = 5V, RL≥10KΩ 5 20 - 5 20 - 5 100 mV

Output Current

ISOURCEVI(+) = 1V, VI(-) = 0V VCC = 15V, VO(P) = 2V

10 20 - 10 20 - 10 20 - mA

ISINK

VI(+) = 0V, VI(-) = 1VVCC = 15V, VO(P) = 2V

10 13 - 5 8 - 5 8 - mA

Differential InputVoltage VI(DIFF) - - - VCC - - VCC - - VCC V

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LM2902,LM324/LM324A,LM224/LM224A

5

Electrical Characteristics (Continued)

(VCC = 5.0V, VEE = GND, TA = 25°C, unless otherwise specified)

Note:1. VCC=30V for LM224A, LM324A

Parameter Symbol ConditionsLM224A LM324A

UnitMin. Typ. Max. Min. Typ. Max.

Input Offset Voltage VIOVCM = 0V to VCC -1.5VVO(P) = 1.4V, RS = 0 Ω

- 1.0 3.0 - 1.5 3.0 mV

Input Offset Current IIO - - 2 15 - 3.0 30 nAInput Bias Current IBIAS - - 40 80 - 40 100 nA

Input Common-ModeVoltage Range VI(R) VCC = 30V 0 - VCC

-1.5 0 -VCC-1.5 V

Supply Current (All Amps) ICCVCC = 30V - 1.5 3 - 1.5 3 mAVCC = 5V - 0.7 1.2 - 0.7 1.2 mA

Large Signal Voltage Gain GVVCC = 15V, RL≥ 2 KΩVO(P) = 1V to 11V 50 100 - 25 100 - V/mV

Output Voltage SwingVO(H)

Note1 RL = 2 KΩ 26 - - 26 - - VRL = 10 KΩ 27 28 - 27 28 - V

VO(L) VCC = 5V, RL≥ 10 KΩ - 5 20 - 5 20 mVCommon-Mode Rejection Ratio CMRR - 70 85 - 65 85 - dB

Power Supply Rejection Ratio PSRR - 65 100 - 65 100 - dBChannel Separation CS f = 1KHz to 20KHz - 120 - - 120 - dBShort Circuit to GND ISC - - 40 60 - 40 60 mA

Output Current

ISOURCEVI(+) = 1V, VI(-) = 0VVCC = 15V 20 40 - 20 40 - mA

ISINK

VI(+) = 0V, VI(-) = 1VVCC = 15V, VO(P) = 2V 10 20 - 10 20 - mA

VI(+) = 0v, VI(-) = 1VVCC = 15V, VO(P) = 200mV

12 50 - 12 50 - µA

Differential Input Voltage VI(DIFF) - - - VCC - - VCC V

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LM2902,LM324/LM324A,LM224/LM224A

6

Electrical Characteristics (Continued)

(VCC = 5.0V, VEE = GND, unless otherwise specified)The following specification apply over the range of -25°C ≤ TA ≤ + 85°C for the LM224A; and the 0°C ≤ TA ≤ +70°C for the LM324A

Parameter Symbol ConditionsLM224A LM324A

UnitMin. Typ. Max. Min. Typ. Max.

Input Offset Voltage VIOVCM = 0V to VCC -1.5VVO(P) = 1.4V, RS = 0Ω - - 4.0 - - 5.0 mV

Input Offset Voltage Drift ∆VIO/∆T - - 7.0 20 - 7.0 30 µV/°CInput Offset Current IIO - - - 30 - - 75 nAInput Offset Current Drift ∆IIO/∆T - - 10 200 - 10 300 pA/°CInput Bias Current IBIAS - - 40 100 - 40 200 nA

Common-Mode InputVoltage Range VI(R) VCC = 30V 0 - VCC

-2.0 0 -VCC-2.0 V

Large Signal Voltage Gain GV VCC = 15V, RL≥ 2.0KΩ 25 - - 15 - - V/mV

Output Voltage SwingVO(H)

VCC = 30V

RL = 2KΩ 26 - - 26 - - VRL = 10KΩ 27 28 - 27 28 -

VO(L) VCC = 5V, RL≥ 10KΩ - 5 20 - 5 20 mA

Output Current ISOURCE

VI(+) = 1V, VI(-) = 0VVCC = 15V 10 20 - 10 20 - mA

ISINKVI(+) = 0V, VI(-) = 1VVCC = 15V 5 8 - 5 8 - mA

Differential Input Voltage VI(DIFF) - - - VCC - - VCC V

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LM2902,LM324/LM324A,LM224/LM224A

7

Typical Performance Characteristics

Figure 1. Input Voltage Range vs Supply Voltage Figure 2. Input Current vs Temperature

Figure 3. Supply Current vs Supply Voltage Figure 4. Voltage Gain vs Supply Voltage

Figure 5. Open Loop Frequency Response Figure 6. Common mode Rejection Ratio

Supply Voltage(v) Temperature Tj ( °C)

Supply Voltage (V) Supply Voltage (V)

Frequency (Hz) Frequency (Hz)

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LM2902,LM324/LM324A,LM224/LM224A

8

Typical Performance Characteristics (Continued)

Figure 7. Slew Rate Figure 8. Voltage Follower Pulse Response

Figure 9. Large Signal Frequency Response Figure 10. Output Characteristics vs Current Sourcing

Figure 11. Output Characteristics vs Current Sinking Figure 12. Current Limiting vs Temperature

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LM2902,LM324/LM324A,LM224/LM224A

9

Mechanical DimensionsPackage

Dimensions in millimeters

6.40 ±0.20

7.620.300

2.54

0.10

0

#1

#7 #8

#14

0.252 ±0.008

0~15°

0.25+0.10–0.05

0.010+0.004–0.002

3.30 ±0.30

0.130 ±0.012

3.25 ±0.20

0.128 ±0.008

19.4

0 ±0

.20

0.76

4 ±0

.008

19.8

00.

780

MA

X

5.080.200

0.200.008

MAX

MIN

2.08

0.08

2(

)

0.46

±0.

10

0.01

8 ±0

.004

0.05

9 ±0

.004

1.50

±0.

10

14-DIP

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LM2902,LM324/LM324A,LM224/LM224A

10

Mechanical Dimensions (Continued)

PackageDimensions in millimeters

8.56

±0.

20

0.33

7 ±0

.008

1.27

0.05

0

5.720.225

1.55 ±0.10

0.061 ±0.004

0.050.002

6.00 ±0.30

0.236 ±0.012

3.95 ±0.20

0.156 ±0.008

0.60 ±0.20

0.024 ±0.008

8.70

0.34

3M

AX

#1

#7 #8

0~8°

#14

0.47

0.01

9(

)

1.800.071

MA

X0.

10M

AX

0.00

4

MAX

MIN

+0.1

0-0

.05

0.20

+0.0

04-0

.002

0.00

8

+0.1

0-0

.05

0.40

6

+ 0.0

04-0

.002

0.01

6

14-SOP

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LM2902,LM324/LM324A,LM224/LM224A

11

Ordering InformationProduct Number Package Operating Temperature

LM324N14-DIP

0 ~ +70°CLM324ANLM324M

14-SOPLM324AMLM2902N 14-DIP

-40 ~ +85°CLM2902M 14-SOPLM224N

14-DIP-25 ~ +85°C

LM224ANLM224M

14-SOPLM224AM

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LM2902,LM324/LM324A,LM224/LM224A

3/22/02 0.0m 001Stock#DSxxxxxxxx

2002 Fairchild Semiconductor Corporation

LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.

2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

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This datasheet has been download from:

www.datasheetcatalog.com

Datasheets for electronics components.

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©2002 Fairchild Semiconductor Corporation

www.fairchildsemi.com

Rev. 1.0.2

Features• High Current Drive Capability (200mA)• Adjustable Duty Cycle• Temperature Stability of 0.005%/°C• Timing From µSec to Hours• Turn off Time Less Than 2µSec

Applications• Precision Timing• Pulse Generation• Time Delay Generation• Sequential Timing

DescriptionThe LM555/NE555/SA555 is a highly stable controllercapable of producing accurate timing pulses. Withmonostable operation, the time delay is controlled by oneexternal resistor and one capacitor. With astable operation,the frequency and duty cycle are accurately controlled withtwo external resistors and one capacitor.

8-DIP

8-SOP

1

1

Internal Block Diagram

F/FOutPutStage

1

7

5

2

3

4

6

8R R R

Comp.

Comp.

Discharging Tr.

Vref

Vcc

Discharge

Threshold

ControlVoltage

GND

Trigger

Output

Reset

LM555/NE555/SA555Single Timer

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LM555/NE555/SA555

2

Absolute Maximum Ratings (TA = 25°°°°C)Parameter Symbol Value UnitSupply Voltage VCC 16 VLead Temperature (Soldering 10sec) TLEAD 300 °CPower Dissipation PD 600 mWOperating Temperature Range LM555/NE555SA555 TOPR

0 ~ +70-40 ~ +85 °C

Storage Temperature Range TSTG -65 ~ +150 °C

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LM555/NE555/SA555

3

Electrical Characteristics(TA = 25°C, VCC = 5 ~ 15V, unless otherwise specified)

Notes:1. Supply current when output is high is typically 1mA less at VCC = 5V2. Tested at VCC = 5.0V and VCC = 15V3. This will determine maximum value of RA + RB for 15V operation, the max. total R = 20MΩ, and for 5V operation the max.

total R = 6.7MΩ

Parameter Symbol Conditions Min. Typ. Max. UnitSupply Voltage VCC - 4.5 - 16 V

Supply Current *1(Low Stable) ICCVCC = 5V, RL = ∞ - 3 6 mAVCC = 15V, RL = ∞ - 7.5 15 mA

Timing Error *2 (Monostable)Initial AccuracyDrift with TemperatureDrift with Supply Voltage

ACCUR∆t/∆T

∆t/∆VCC

RA = 1kΩ to100kΩC = 0.1µF

- 1.0500.1

3.0

0.5

%ppm/°C

%/V

Timing Error *2(Astable)Intial AccuracyDrift with TemperatureDrift with Supply Voltage

ACCUR∆t/∆T

∆t/∆VCC

RA = 1kΩ to 100kΩC = 0.1µF

- 2.251500.3

- %ppm/°C

%/V

Control Voltage VCVCC = 15V 9.0 10.0 11.0 VVCC = 5V 2.6 3.33 4.0 V

Threshold Voltage VTHVCC = 15V - 10.0 - VVCC = 5V - 3.33 - V

Threshold Current *3 ITH - - 0.1 0.25 µA

Trigger Voltage VTRVCC = 5V 1.1 1.67 2.2 VVCC = 15V 4.5 5 5.6 V

Trigger Current ITR VTR = 0V 0.01 2.0 µAReset Voltage VRST - 0.4 0.7 1.0 VReset Current IRST - 0.1 0.4 mA

Low Output Voltage VOL

VCC = 15VISINK = 10mAISINK = 50mA

- 0.060.3

0.250.75

VV

VCC = 5VISINK = 5mA - 0.05 0.35 V

High Output Voltage VOH

VCC = 15VISOURCE = 200mAISOURCE = 100mA 12.75

12.513.3

- VV

VCC = 5VISOURCE = 100mA 2.75 3.3 - V

Rise Time of Output tR - - 100 - nsFall Time of Output tF - - 100 - nsDischarge Leakage Current ILKG - - 20 100 nA

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LM555/NE555/SA555

4

Application InformationTable 1 below is the basic operating table of 555 timer:

When the low signal input is applied to the reset terminal, the timer output remains low regardless of the threshold voltage or the trigger voltage. Only when the high signal is applied to the reset terminal, timer's output changes according to threshold voltage and trigger voltage.When the threshold voltage exceeds 2/3 of the supply voltage while the timer output is high, the timer's internal discharge Tr. turns on, lowering the threshold voltage to below 1/3 of the supply voltage. During this time, the timer output is maintained low. Later, if a low signal is applied to the trigger voltage so that it becomes 1/3 of the supply voltage, the timer's internal discharge Tr. turns off, increasing the threshold voltage and driving the timer output again at high.

1. Monostable Operation

Table 1. Basic Operating TableThreshold Voltage

(Vth)(PIN 6)Trigger Voltage

(Vtr)(PIN 2) Reset(PIN 4) Output(PIN 3) Discharging Tr.(PIN 7)

Don't care Don't care Low Low ONVth > 2Vcc / 3 Vth > 2Vcc / 3 High Low ON

Vcc / 3 < Vth < 2 Vcc / 3 Vcc / 3 < Vth < 2 Vcc / 3 High - -Vth < Vcc / 3 Vth < Vcc / 3 High High OFF

10-5 10-4 10-3 10-2 10-1 100 101 10210-3

10-2

10-1

100

101

102

10M

ΩΩΩΩ

1MΩΩΩΩ10

kΩΩΩΩ10

0kΩΩΩΩ

R A=1k

ΩΩΩΩ

C

apac

itanc

e(uF

)

Time Delay(s)

Figure 1. Monoatable Circuit Figure 2. Resistance and Capacitance vs. Time delay(td)

Figure 3. Waveforms of Monostable Operation

1

5

6

7

84

2

3

RESET VccDISCH

THRES

CONTGND

OUT

TRIG

+Vcc

RA

C1

C2RL

Trigger

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LM555/NE555/SA555

5

Figure 1 illustrates a monostable circuit. In this mode, the timer generates a fixed pulse whenever the trigger voltage falls below Vcc/3. When the trigger pulse voltage applied to the #2 pin falls below Vcc/3 while the timer output is low, the timer's internal flip-flop turns the discharging Tr. off and causes the timer output to become high by charging the external capacitor C1and setting the flip-flop output at the same time. The voltage across the external capacitor C1, VC1 increases exponentially with the time constant t=RA*C and reaches 2Vcc/3 at td=1.1RA*C. Hence, capacitor C1 is charged through resistor RA. The greater the time constant RAC, the longer it takes for the VC1 to reach 2Vcc/3. In other words, the time constant RAC controls the output pulse width. When the applied voltage to the capacitor C1 reaches 2Vcc/3, the comparator on the trigger terminal resets the flip-flop, turning the discharging Tr. on. At this time, C1 begins to discharge and the timer output converts to low.In this way, the timer operating in monostable repeats the above process. Figure 2 shows the time constant relationship based on RA and C. Figure 3 shows the general waveforms during monostable operation. It must be noted that, for normal operation, the trigger pulse voltage needs to maintain a minimum of Vcc/3 before the timer output turns low. That is, although the output remains unaffected even if a different trigger pulse is applied while the output is high, it may be affected and the waveform not operate properly if the trigger pulse voltage at the end of the output pulse remains at below Vcc/3. Figure 4 shows such timer output abnormality.

2. Astable Operation

Figure 4. Waveforms of Monostable Operation (abnormal)

100m 1 10 100 1k 10k 100k1E-3

0.01

0.1

1

10

100

10M

1M

100k

10k

1k

(RA+2RB)

Cap

acita

nce(

uF)

Frequency(Hz)

Figure 5. Astable Circuit Figure 6. Capacitance and Resistance vs. Frequency

1

5

6

7

84

2

3

RESET VccDISCH

THRES

CONTGND

OUT

TRIG

+Vcc

RA

C1

C2RL

RB

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LM555/NE555/SA555

6

An astable timer operation is achieved by adding resistor RB to Figure 1 and configuring as shown on Figure 5. In astable operation, the trigger terminal and the threshold terminal are connected so that a self-trigger is formed, operating as a multi vibrator. When the timer output is high, its internal discharging Tr. turns off and the VC1 increases by exponential function with the time constant (RA+RB)*C. When the VC1, or the threshold voltage, reaches 2Vcc/3, the comparator output on the trigger terminal becomes high,resetting the F/F and causing the timer output to become low. This in turn turns on the discharging Tr. and the C1 discharges through the discharging channel formed by RB and the discharging Tr. When the VC1 falls below Vcc/3, the comparator output on the trigger terminal becomes high and the timer output becomes high again. The discharging Tr. turns off and the VC1 rises again. In the above process, the section where the timer output is high is the time it takes for the VC1 to rise from Vcc/3 to 2Vcc/3, and the section where the timer output is low is the time it takes for the VC1 to drop from 2Vcc/3 to Vcc/3. When timer output is high, the equivalent circuit for charging capacitor C1 is as follows:

Since the duration of the timer output high state(tH) is the amount of time it takes for the VC1(t) to reach 2Vcc/3,

Figure 7. Waveforms of Astable Operation

Vcc

RA RB

C1 Vc1(0-)=Vcc/3

C1dvc1

dt-------------

Vcc V 0-( )–

RA RB+-------------------------------= 1( )

VC1 0+( ) VCC 3⁄= 2( )

VC1 t( ) VCC 1 23---e

- tRA RB+( )C1

------------------------------------–

= 3( )

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LM555/NE555/SA555

7

The equivalent circuit for discharging capacitor C1 when timer output is low as follows:

Since the duration of the timer output low state(tL) is the amount of time it takes for the VC1(t) to reach Vcc/3,

Since RD is normally RB>>RD although related to the size of discharging Tr.,tL=0.693RBC1 (10)

Consequently, if the timer operates in astable, the period is the same with 'T=tH+tL=0.693(RA+RB)C1+0.693RBC1=0.693(RA+2RB)C1' because the period is the sum of the charge time and discharge time. And since frequency is the reciprocal of the period, the following applies.

3. Frequency dividerBy adjusting the length of the timing cycle, the basic circuit of Figure 1 can be made to operate as a frequency divider. Figure 8. illustrates a divide-by-three circuit that makes use of the fact that retriggering cannot occur during the timing cycle.

VC1 t( ) 23---VCC V=

CC1 2

3---e

-tH

RA RB+( )C1------------------------------------–

= 4( )

tH C1 RA RB+( )In2 0.693 RA RB+( )C1== 5( )

C1

RB

RDVC1(0-)=2Vcc/3

C1dvC1

dt-------------- 1

RA RB+-----------------------VC1 0=+ 6( )

VC1 t( ) 23---V

CCe

- tRA RD+( )C1

-------------------------------------

= 7( )

13---VCC

23---V

CCe

-tL

RA RD+( )C1-------------------------------------

= 8( )

tL C1 RB RD+( )In2 0.693 RB RD+( )C1== 9( )

frequency, f 1T--- 1.44

RA 2RB+( )C1----------------------------------------= = 11( )

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LM555/NE555/SA555

8

4. Pulse Width ModulationThe timer output waveform may be changed by modulating the control voltage applied to the timer's pin 5 and changing the reference of the timer's internal comparators. Figure 9. illustrates the pulse width modulation circuit.When the continuous trigger pulse train is applied in the monostable mode, the timer output width is modulated according to the signal applied to the control terminal. Sine wave as well as other waveforms may be applied as a signal to the control terminal. Figure 10 shows an example of pulse width modulation waveform.

5. Pulse Position ModulationIf the modulating signal is applied to the control terminal while the timer is connected for astable operation as in Figure 11, the timer becomes a pulse position modulator.In the pulse position modulator, the reference of the timer's internal comparators is modulated which in turn modulates the timer output according to the modulation signal applied to the control terminal.Figure 12 illustrates a sine wave for modulation signal and the resulting output pulse position modulation : however, any wave shape could be used.

Figure 8. Waveforms of Frequency Divider Operation

Figure 9. Circuit for Pulse Width Modulation Figure 10. Waveforms of Pulse Width Modulation

84

7

1

2

3

5

6

CONTGND

Vcc

DISCH

THRES

RESET

TRIG

OUT

+Vcc

Trigger

RA

C

OutputInput

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LM555/NE555/SA555

9

6. Linear RampWhen the pull-up resistor RA in the monostable circuit shown in Figure 1 is replaced with constant current source, the VC1 increases linearly, generating a linear ramp. Figure 13 shows the linear ramp generating circuit and Figure 14 illustrates the generated linear ramp waveforms.

In Figure 13, current source is created by PNP transistor Q1 and resistor R1, R2, and RE.

For example, if Vcc=15V, RE=20kΩ, R1=5kW, R2=10kΩ, and VBE=0.7V, VE=0.7V+10V=10.7VIc=(15-10.7)/20k=0.215mA

84

7

1

2

3

5

6

CONTGND

Vcc

DISCH

THRES

RESET

TRIG

OUT

+Vcc

RA

C

RB

Modulation

Output

Figure 11. Circuit for Pulse Position Modulation Figure 12. Waveforms of pulse position modulation

Figure 13. Circuit for Linear Ramp Figure 14. Waveforms of Linear Ramp

1

5

6

7

84

2

3

RESET VccDISCH

THRES

CONTGND

OUT

TRIG

+Vcc

C2

R1

R2

C1

Q1

Output

RE

ICVCC VE–

RE---------------------------= 12( )

Here, VE is

VE VBER2

R1 R2+----------------------VCC+= 13( )

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LM555/NE555/SA555

10

When the trigger is started in a timer configured as shown in Figure 13, the current flowing to capacitor C1 becomes a constant current generated by PNP transistor and resistors. Hence, the VC is a linear ramp function as shown in Figure 14. The gradient S of the linear ramp function is defined as follows:

Here the Vp-p is the peak-to-peak voltage.If the electric charge amount accumulated in the capacitor is divided by the capacitance, the VC comes out as follows:

V=Q/C (15)

The above equation divided on both sides by T gives us

and may be simplified into the following equation.

S=I/C (17)

In other words, the gradient of the linear ramp function appearing across the capacitor can be obtained by using the constant current flowing through the capacitor. If the constant current flow through the capacitor is 0.215mA and the capacitance is 0.02uF, the gradient of the ramp function at both ends of the capacitor is S = 0.215m/0.022u = 9.77V/ms.

SVp p–

T----------------= 14( )

VT---- Q T⁄

C------------= 16( )

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LM555/NE555/SA555

11

Mechanical DimensionsPackage

Dimensions in millimeters

6.40 ±0.20

3.30 ±0.30

0.130 ±0.012

3.40 ±0.20

0.134 ±0.008

#1

#4 #5

#8

0.252 ±0.008

9.20

±0.

20

0.79

2.54

0.10

0

0.03

1(

)

0.46

±0.

10

0.01

8 ±0

.004

0.06

0 ±0

.004

1.52

4 ±0

.10

0.36

2 ±0

.008

9.60

0.37

8M

AX

5.080.200

0.330.013

7.62

0~15°

0.300

MAX

MIN

0.25+0.10–0.05

0.010+0.004–0.002

8-DIP

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LM555/NE555/SA555

12

Mechanical Dimensions (Continued)

PackageDimensions in millimeters

4.9

2 ±

0.2

0

0.1

94

±0.0

08

0.4

1 ±

0.1

0

0.0

16

±0.0

04

1.2

70

.05

0

5.720.225

1.55 ±0.20

0.061 ±0.008

0.1~0.250.004~0.001

6.00 ±0.30

0.236 ±0.012

3.95 ±0.20

0.156 ±0.008

0.50 ±0.20

0.020 ±0.008

5.1

30

.20

2M

AX

#1

#4 #5

0~8°

#8

0.5

60

.02

2(

)

1.800.071

MA

X0

.10

MA

X0

.00

4

MAX

MIN

+0.1

0-0

.05

0.1

5

+0.0

04

-0.0

02

0.0

06

8-SOP

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LM555/NE555/SA555

13

Ordering InformationProduct Number Package Operating Temperature

LM555CN 8-DIP0 ~ +70°C

LM555CM 8-SOP

Product Number Package Operating TemperatureNE555N 8-DIP

0 ~ +70°CNE555D 8-SOP

Product Number Package Operating TemperatureSA555 8-DIP

-40 ~ +85°CSA555D 8-SOP

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LM555/NE555/SA555

7/16/02 0.0m 001Stock#DSxxxxxxxx

2002 Fairchild Semiconductor Corporation

LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.

2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

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This datasheet has been download from:

www.datasheetcatalog.com

Datasheets for electronics components.

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1/34November 2004

OUTPUT CURRENT TO 1.5A OUTPUT VOLTAGES OF 5; 5.2; 6; 8; 8.5; 9;

10; 12; 15; 18; 24V THERMAL OVERLOAD PROTECTION SHORT CIRCUIT PROTECTION OUTPUT TRANSITION SOA PROTECTION

DESCRIPTION The L7800 series of three-terminal positiveregulators is available in TO-220, TO-220FP,TO-220FM, TO-3 and D2PAK packages andseveral fixed output voltages, making it useful in awide range of applications. These regulators canprovide local on-card regulation, eliminating thedistribution problems associated with single pointregulation. Each type employs internal currentlimiting, thermal shut-down and safe areaprotection, making it essentially indestructible. Ifadequate heat sinking is provided, they candeliver over 1A output current. Although designedprimarily as fixed voltage regulators, thesedevices can be used with external components toobtain adjustable voltage and currents.

L7800SERIES

POSITIVE VOLTAGE REGULATORS

Figure 1: Schematic Diagram

TO-220

D2PAK TO-3

TO-220FPTO-220FM

Rev. 12

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L7800 SERIES

2/34

Table 1: Absolute Maximum Ratings

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.

Table 2: Thermal Data

Figure 2: Schematic Diagram

Symbol Parameter Value Unit

VIDC Input Voltage for VO= 5 to 18V 35

Vfor VO= 20, 24V 40

IO Output Current Internally Limited

Ptot Power Dissipation Internally Limited

Tstg Storage Temperature Range -65 to 150 °C

TopOperating Junction Temperature Range

for L7800 -55 to 150°C

for L7800C 0 to 150

Symbol Parameter D2PAK TO-220 TO-220FP TO-220FM TO-3 Unit

Rthj-case Thermal Resistance Junction-case Max 3 5 5 5 4 °C/W

Rthj-ambThermal Resistance Junction-ambient Max

62.5 50 60 60 35 °C/W

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L7800 SERIES

3/34

Figure 3: Connection Diagram (top view)

Table 3: Order Codes

(*) Available in Tape & Reel with the suffix "-TR".

TYPE TO-220(A Type)

TO-220(C Type)

TO-220(E Type)

D2PAK(A Type) (*)

D2PAK(C Type)(T & R)

TO-220FP TO-220FM TO-3

L7805 L7805TL7805C L7805CV L7805C-V L7805CV1 L7805CD2T L7805C-D2TR L7805CP L7805CF L7805CT

L7852C L7852CV L7852CD2T L7852CP L7852CF L7852CTL7806 L7806T

L7806C L7806CV L7806C-V L7806CD2T L7806CP L7806CF L7806CTL7808 L7808T

L7808C L7808CV L7808C-V L7808CD2T L7808CP L7808CF L7808CTL7885C L7885CV L7885CD2T L7885CP L7885CF L7885CTL7809C L7809CV L7809C-V L7809CD2T L7809CP L7809CF L7809CTL7810C L7810CV L7810CD2T L7810CPL7812 L7812T

L7812C L7812CV L7812C-V L7812CD2T L7812CP L7812CF L7812CTL7815 L7815T

L7815C L7815CV L7815C-V L7815CD2T L7815CP L7815CF L7815CT

L7818 L7818TL7818C L7818CV L7818CD2T L7818CP L7818CF L7818CTL7820 L7820T

L7820C L7820CV L7820CD2T L7820CP L7820CF L7820CTL7824 L7824T

L7824C L7824CV L7824CD2T L7824CP L7824CF L7824CT

TO-220 (Any Type)

TO-3D2PAK (Any Type)

TO-220FP/TO-220FM

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L7800 SERIES

4/34

Figure 4: Application Circuits

TEST CIRCUITS

Figure 5: DC Parameter

Figure 6: Load Regulation

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L7800 SERIES

5/34

Figure 7: Ripple Rejection

Table 4: Electrical Characteristics Of L7805 (refer to the test circuits, TJ = -55 to 150°C, VI = 10V,IO = 500 mA, CI = 0.33 µF, CO = 0.1 µF unless otherwise specified).

(*) Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.

Symbol Parameter Test Conditions Min. Typ. Max. Unit

VO Output Voltage TJ = 25°C 4.8 5 5.2 V

VO Output Voltage IO = 5 mA to 1 A PO ≤ 15WVI = 8 to 20 V

4.65 5 5.35 V

∆VO(*) Line Regulation VI = 7 to 25 V TJ = 25°C 3 50 mV

VI = 8 to 12 V TJ = 25°C 1 25

∆VO(*) Load Regulation IO = 5 mA to 1.5 A TJ = 25°C 100 mV

IO = 250 to 750 mA TJ = 25°C 25

Id Quiescent Current TJ = 25°C 6 mA

∆Id Quiescent Current Change IO = 5 mA to 1 A 0.5 mA

VI = 8 to 25 V 0.8

∆VO/∆T Output Voltage Drift IO = 5 mA 0.6 mV/°C

eN Output Noise Voltage B =10Hz to 100KHz TJ = 25°C 40 µV/VO

SVR Supply Voltage Rejection VI = 8 to 18 V f = 120Hz 68 dB

Vd Dropout Voltage IO = 1 A TJ = 25°C 2 2.5 V

RO Output Resistance f = 1 KHz 17 mΩ

Isc Short Circuit Current VI = 35 V TJ = 25°C 0.75 1.2 A

Iscp Short Circuit Peak Current TJ = 25°C 1.3 2.2 3.3 A

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Table 5: Electrical Characteristics Of L7806 (refer to the test circuits, TJ = -55 to 150°C, VI = 11V,IO = 500 mA, CI = 0.33 µF, CO = 0.1 µF unless otherwise specified).

(*) Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.

Table 6: Electrical Characteristics Of L7808 (refer to the test circuits, TJ = -55 to 150°C, VI = 14V,IO = 500 mA, CI = 0.33 µF, CO = 0.1 µF unless otherwise specified).

(*) Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.

Symbol Parameter Test Conditions Min. Typ. Max. Unit

VO Output Voltage TJ = 25°C 5.75 6 6.25 V

VO Output Voltage IO = 5 mA to 1 A PO ≤ 15WVI = 9 to 21 V

5.65 6 6.35 V

∆VO(*) Line Regulation VI = 8 to 25 V TJ = 25°C 60 mV

VI = 9 to 13 V TJ = 25°C 30

∆VO(*) Load Regulation IO = 5 mA to 1.5 A TJ = 25°C 100 mV

IO = 250 to 750 mA TJ = 25°C 30

Id Quiescent Current TJ = 25°C 6 mA

∆Id Quiescent Current Change IO = 5 mA to 1 A 0.5 mA

VI = 9 to 25 V 0.8

∆VO/∆T Output Voltage Drift IO = 5 mA 0.7 mV/°C

eN Output Noise Voltage B =10Hz to 100KHz TJ = 25°C 40 µV/VO

SVR Supply Voltage Rejection VI = 9 to 19 V f = 120Hz 65 dB

Vd Dropout Voltage IO = 1 A TJ = 25°C 2 2.5 V

RO Output Resistance f = 1 KHz 19 mΩIsc Short Circuit Current VI = 35 V TJ = 25°C 0.75 1.2 A

Iscp Short Circuit Peak Current TJ = 25°C 1.3 2.2 3.3 A

Symbol Parameter Test Conditions Min. Typ. Max. Unit

VO Output Voltage TJ = 25°C 7.7 8 8.3 V

VO Output Voltage IO = 5 mA to 1 A PO ≤ 15WVI = 11.5 to 23 V

7.6 8 8.4 V

∆VO(*) Line Regulation VI = 10.5 to 25 V TJ = 25°C 80 mV

VI = 11 to 17 V TJ = 25°C 40

∆VO(*) Load Regulation IO = 5 mA to 1.5 A TJ = 25°C 100 mV

IO = 250 to 750 mA TJ = 25°C 40

Id Quiescent Current TJ = 25°C 6 mA

∆Id Quiescent Current Change IO = 5 mA to 1 A 0.5 mA

VI = 11.5 to 25 V 0.8

∆VO/∆T Output Voltage Drift IO = 5 mA 1 mV/°C

eN Output Noise Voltage B =10Hz to 100KHz TJ = 25°C 40 µV/VO

SVR Supply Voltage Rejection VI = 11.5 to 21.5 V f = 120Hz 62 dB

Vd Dropout Voltage IO = 1 A TJ = 25°C 2 2.5 V

RO Output Resistance f = 1 KHz 16 mΩ

Isc Short Circuit Current VI = 35 V TJ = 25°C 0.75 1.2 A

Iscp Short Circuit Peak Current TJ = 25°C 1.3 2.2 3.3 A

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7/34

Table 7: Electrical Characteristics Of L7812 (refer to the test circuits, TJ = -55 to 150°C, VI = 19V,IO = 500 mA, CI = 0.33 µF, CO = 0.1 µF unless otherwise specified).

(*) Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.

Table 8: Electrical Characteristics Of L7815 (refer to the test circuits, TJ = -55 to 150°C, VI = 23V,IO = 500 mA, CI = 0.33 µF, CO = 0.1 µF unless otherwise specified).

(*) Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.

Symbol Parameter Test Conditions Min. Typ. Max. Unit

VO Output Voltage TJ = 25°C 11.5 12 12.5 V

VO Output Voltage IO = 5 mA to 1 A PO ≤ 15WVI = 15.5 to 27 V

11.4 12 12.6 V

∆VO(*) Line Regulation VI = 14.5 to 30 V TJ = 25°C 120 mV

VI = 16 to 22 V TJ = 25°C 60

∆VO(*) Load Regulation IO = 5 mA to 1.5 A TJ = 25°C 100 mV

IO = 250 to 750 mA TJ = 25°C 60

Id Quiescent Current TJ = 25°C 6 mA

∆Id Quiescent Current Change IO = 5 mA to 1 A 0.5 mA

VI = 15 to 30 V 0.8

∆VO/∆T Output Voltage Drift IO = 5 mA 1.5 mV/°C

eN Output Noise Voltage B =10Hz to 100KHz TJ = 25°C 40 µV/VO

SVR Supply Voltage Rejection VI = 15 to 25 V f = 120Hz 61 dB

Vd Dropout Voltage IO = 1 A TJ = 25°C 2 2.5 V

RO Output Resistance f = 1 KHz 18 mΩIsc Short Circuit Current VI = 35 V TJ = 25°C 0.75 1.2 A

Iscp Short Circuit Peak Current TJ = 25°C 1.3 2.2 3.3 A

Symbol Parameter Test Conditions Min. Typ. Max. Unit

VO Output Voltage TJ = 25°C 14.4 15 15.6 V

VO Output Voltage IO = 5 mA to 1 A PO ≤ 15WVI = 18.5 to 30 V

14.25 15 15.75 V

∆VO(*) Line Regulation VI = 17.5 to 30 V TJ = 25°C 150 mV

VI = 20 to 26 V TJ = 25°C 75

∆VO(*) Load Regulation IO = 5 mA to 1.5 A TJ = 25°C 150 mV

IO = 250 to 750 mA TJ = 25°C 75

Id Quiescent Current TJ = 25°C 6 mA

∆Id Quiescent Current Change IO = 5 mA to 1 A 0.5 mA

VI = 18.5 to 30 V 0.8

∆VO/∆T Output Voltage Drift IO = 5 mA 1.8 mV/°C

eN Output Noise Voltage B =10Hz to 100KHz TJ = 25°C 40 µV/VO

SVR Supply Voltage Rejection VI = 18.5 to 28.5 V f = 120Hz 60 dB

Vd Dropout Voltage IO = 1 A TJ = 25°C 2 2.5 V

RO Output Resistance f = 1 KHz 19 mΩ

Isc Short Circuit Current VI = 35 V TJ = 25°C 0.75 1.2 A

Iscp Short Circuit Peak Current TJ = 25°C 1.3 2.2 3.3 A

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Table 9: Electrical Characteristics Of L7818 (refer to the test circuits, TJ = -55 to 150°C, VI = 26V,IO = 500 mA, CI = 0.33 µF, CO = 0.1 µF unless otherwise specified).

(*) Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.

Table 10: Electrical Characteristics Of L7820 (refer to the test circuits, TJ = -55 to 150°C, VI = 28V,IO = 500 mA, CI = 0.33 µF, CO = 0.1 µF unless otherwise specified).

(*) Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.

Symbol Parameter Test Conditions Min. Typ. Max. Unit

VO Output Voltage TJ = 25°C 17.3 18 18.7 V

VO Output Voltage IO = 5 mA to 1 A PO ≤ 15WVI = 22 to 33 V

17.1 18 18.9 V

∆VO(*) Line Regulation VI = 21 to 33 V TJ = 25°C 180 mV

VI = 24 to 30 V TJ = 25°C 90

∆VO(*) Load Regulation IO = 5 mA to 1.5 A TJ = 25°C 180 mV

IO = 250 to 750 mA TJ = 25°C 90

Id Quiescent Current TJ = 25°C 6 mA

∆Id Quiescent Current Change IO = 5 mA to 1 A 0.5 mA

VI = 22 to 33 V 0.8

∆VO/∆T Output Voltage Drift IO = 5 mA 2.3 mV/°C

eN Output Noise Voltage B =10Hz to 100KHz TJ = 25°C 40 µV/VO

SVR Supply Voltage Rejection VI = 22 to 32 V f = 120Hz 59 dB

Vd Dropout Voltage IO = 1 A TJ = 25°C 2 2.5 V

RO Output Resistance f = 1 KHz 22 mΩIsc Short Circuit Current VI = 35 V TJ = 25°C 0.75 1.2 A

Iscp Short Circuit Peak Current TJ = 25°C 1.3 2.2 3.3 A

Symbol Parameter Test Conditions Min. Typ. Max. Unit

VO Output Voltage TJ = 25°C 19.2 20 20.8 V

VO Output Voltage IO = 5 mA to 1 A PO ≤ 15WVI = 24 to 35 V

19 20 21 V

∆VO(*) Line Regulation VI = 22.5 to 35 V TJ = 25°C 200 mV

VI = 26 to 32 V TJ = 25°C 100

∆VO(*) Load Regulation IO = 5 mA to 1.5 A TJ = 25°C 200 mV

IO = 250 to 750 mA TJ = 25°C 100

Id Quiescent Current TJ = 25°C 6 mA

∆Id Quiescent Current Change IO = 5 mA to 1 A 0.5 mA

VI = 24 to 35 V 0.8

∆VO/∆T Output Voltage Drift IO = 5 mA 2.5 mV/°C

eN Output Noise Voltage B =10Hz to 100KHz TJ = 25°C 40 µV/VO

SVR Supply Voltage Rejection VI = 24 to 35 V f = 120Hz 58 dB

Vd Dropout Voltage IO = 1 A TJ = 25°C 2 2.5 V

RO Output Resistance f = 1 KHz 24 mΩ

Isc Short Circuit Current VI = 35 V TJ = 25°C 0.75 1.2 A

Iscp Short Circuit Peak Current TJ = 25°C 1.3 2.2 3.3 A

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Table 11: Electrical Characteristics Of L7824 (refer to the test circuits, TJ = -55 to 150°C, VI = 33V,IO = 500 mA, CI = 0.33 µF, CO = 0.1 µF unless otherwise specified).

(*) Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.

Table 12: Electrical Characteristics Of L7805C (refer to the test circuits, TJ = 0 to 125°C, VI = 10V,IO = 500 mA, CI = 0.33 µF, CO = 0.1 µF unless otherwise specified).

(*) Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.

Symbol Parameter Test Conditions Min. Typ. Max. Unit

VO Output Voltage TJ = 25°C 23 24 25 V

VO Output Voltage IO = 5 mA to 1 A PO ≤ 15WVI = 28 to 38 V

22.8 24 25.2 V

∆VO(*) Line Regulation VI = 27 to 38 V TJ = 25°C 240 mV

VI = 30 to 36 V TJ = 25°C 120

∆VO(*) Load Regulation IO = 5 mA to 1.5 A TJ = 25°C 240 mV

IO = 250 to 750 mA TJ = 25°C 120

Id Quiescent Current TJ = 25°C 6 mA

∆Id Quiescent Current Change IO = 5 mA to 1 A 0.5 mA

VI = 28 to 38 V 0.8

∆VO/∆T Output Voltage Drift IO = 5 mA 3 mV/°C

eN Output Noise Voltage B =10Hz to 100KHz TJ = 25°C 40 µV/VO

SVR Supply Voltage Rejection VI = 28 to 38 V f = 120Hz 56 dB

Vd Dropout Voltage IO = 1 A TJ = 25°C 2 2.5 V

RO Output Resistance f = 1 KHz 28 mΩIsc Short Circuit Current VI = 35 V TJ = 25°C 0.75 1.2 A

Iscp Short Circuit Peak Current TJ = 25°C 1.3 2.2 3.3 A

Symbol Parameter Test Conditions Min. Typ. Max. Unit

VO Output Voltage TJ = 25°C 4.8 5 5.2 V

VO Output Voltage IO = 5 mA to 1 A PO ≤ 15WVI = 7 to 20 V

4.75 5 5.25 V

∆VO(*) Line Regulation VI = 7 to 25 V TJ = 25°C 3 100 mV

VI = 8 to 12 V TJ = 25°C 1 50

∆VO(*) Load Regulation IO = 5 mA to 1.5 A TJ = 25°C 100 mV

IO = 250 to 750 mA TJ = 25°C 50

Id Quiescent Current TJ = 25°C 8 mA

∆Id Quiescent Current Change IO = 5 mA to 1 A 0.5 mA

VI = 7 to 25 V 0.8

∆VO/∆T Output Voltage Drift IO = 5 mA -1.1 mV/°C

eN Output Noise Voltage B =10Hz to 100KHz TJ = 25°C 40 µV/VO

SVR Supply Voltage Rejection VI = 8 to 18 V f = 120Hz 62 dB

Vd Dropout Voltage IO = 1 A TJ = 25°C 2 V

RO Output Resistance f = 1 KHz 17 mΩ

Isc Short Circuit Current VI = 35 V TJ = 25°C 0.75 A

Iscp Short Circuit Peak Current TJ = 25°C 2.2 A

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Table 13: Electrical Characteristics Of L7852C (refer to the test circuits, TJ = 0 to 125°C, VI = 10V,IO = 500 mA, CI = 0.33 µF, CO = 0.1 µF unless otherwise specified).

(*) Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.

Table 14: Electrical Characteristics Of L7806C (refer to the test circuits, TJ = 0 to 125°C, VI = 11V,IO = 500 mA, CI = 0.33 µF, CO = 0.1 µF unless otherwise specified).

(*) Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.

Symbol Parameter Test Conditions Min. Typ. Max. Unit

VO Output Voltage TJ = 25°C 5.0 5.2 5.4 V

VO Output Voltage IO = 5 mA to 1 A PO ≤ 15WVI = 8 to 20 V

4.95 5.2 5.45 V

∆VO(*) Line Regulation VI = 7 to 25 V TJ = 25°C 3 105 mV

VI = 8 to 12 V TJ = 25°C 1 52

∆VO(*) Load Regulation IO = 5 mA to 1.5 A TJ = 25°C 105 mV

IO = 250 to 750 mA TJ = 25°C 52

Id Quiescent Current TJ = 25°C 8 mA

∆Id Quiescent Current Change IO = 5 mA to 1 A 0.5 mA

VI = 7 to 25 V 1.3

∆VO/∆T Output Voltage Drift IO = 5 mA -1 mV/°C

eN Output Noise Voltage B =10Hz to 100KHz TJ = 25°C 42 µV/VO

SVR Supply Voltage Rejection VI = 8 to 18 V f = 120Hz 61 dB

Vd Dropout Voltage IO = 1 A TJ = 25°C 2 V

RO Output Resistance f = 1 KHz 17 mΩIsc Short Circuit Current VI = 35 V TJ = 25°C 0.75 A

Iscp Short Circuit Peak Current TJ = 25°C 2.2 A

Symbol Parameter Test Conditions Min. Typ. Max. Unit

VO Output Voltage TJ = 25°C 5.75 6 6.25 V

VO Output Voltage IO = 5 mA to 1 A PO ≤ 15WVI = 8 to 21 V

5.7 6 6.3 V

∆VO(*) Line Regulation VI = 8 to 25 V TJ = 25°C 120 mV

VI = 9 to 13 V TJ = 25°C 60

∆VO(*) Load Regulation IO = 5 mA to 1.5 A TJ = 25°C 120 mV

IO = 250 to 750 mA TJ = 25°C 60

Id Quiescent Current TJ = 25°C 8 mA

∆Id Quiescent Current Change IO = 5 mA to 1 A 0.5 mA

VI = 8 to 25 V 1.3

∆VO/∆T Output Voltage Drift IO = 5 mA -0.8 mV/°C

eN Output Noise Voltage B =10Hz to 100KHz TJ = 25°C 45 µV/VO

SVR Supply Voltage Rejection VI = 9 to 19 V f = 120Hz 59 dB

Vd Dropout Voltage IO = 1 A TJ = 25°C 2 V

RO Output Resistance f = 1 KHz 19 mΩ

Isc Short Circuit Current VI = 35 V TJ = 25°C 0.55 A

Iscp Short Circuit Peak Current TJ = 25°C 2.2 A

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Table 15: Electrical Characteristics Of L7808C (refer to the test circuits, TJ = 0 to 125°C, VI = 14V,IO = 500 mA, CI = 0.33 µF, CO = 0.1 µF unless otherwise specified).

(*) Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.

Table 16: Electrical Characteristics Of L7885C (refer to the test circuits, TJ = 0 to 125°C, VI = 14.5V,IO = 500 mA, CI = 0.33 µF, CO = 0.1 µF unless otherwise specified).

(*) Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.

Symbol Parameter Test Conditions Min. Typ. Max. Unit

VO Output Voltage TJ = 25°C 7.7 8 8.3 V

VO Output Voltage IO = 5 mA to 1 A PO ≤ 15WVI = 10.5 to 25 V

7.6 8 8.4 V

∆VO(*) Line Regulation VI = 10.5 to 25 V TJ = 25°C 160 mV

VI = 11 to 17 V TJ = 25°C 80

∆VO(*) Load Regulation IO = 5 mA to 1.5 A TJ = 25°C 160 mV

IO = 250 to 750 mA TJ = 25°C 80

Id Quiescent Current TJ = 25°C 8 mA

∆Id Quiescent Current Change IO = 5 mA to 1 A 0.5 mA

VI = 10.5 to 25 V 1

∆VO/∆T Output Voltage Drift IO = 5 mA -0.8 mV/°C

eN Output Noise Voltage B =10Hz to 100KHz TJ = 25°C 52 µV/VO

SVR Supply Voltage Rejection VI = 11.5 to 21.5 V f = 120Hz 56 dB

Vd Dropout Voltage IO = 1 A TJ = 25°C 2 V

RO Output Resistance f = 1 KHz 16 mΩIsc Short Circuit Current VI = 35 V TJ = 25°C 0.45 A

Iscp Short Circuit Peak Current TJ = 25°C 2.2 A

Symbol Parameter Test Conditions Min. Typ. Max. Unit

VO Output Voltage TJ = 25°C 8.2 8.5 8.8 V

VO Output Voltage IO = 5 mA to 1 A PO ≤ 15WVI = 11 to 26 V

8.1 8.5 8.9 V

∆VO(*) Line Regulation VI = 11 to 27 V TJ = 25°C 160 mV

VI = 11.5 to 17.5 V TJ = 25°C 80

∆VO(*) Load Regulation IO = 5 mA to 1.5 A TJ = 25°C 160 mV

IO = 250 to 750 mA TJ = 25°C 80

Id Quiescent Current TJ = 25°C 8 mA

∆Id Quiescent Current Change IO = 5 mA to 1 A 0.5 mA

VI = 11 to 27 V 1

∆VO/∆T Output Voltage Drift IO = 5 mA -0.8 mV/°C

eN Output Noise Voltage B =10Hz to 100KHz TJ = 25°C 55 µV/VO

SVR Supply Voltage Rejection VI = 12 to 22 V f = 120Hz 56 dB

Vd Dropout Voltage IO = 1 A TJ = 25°C 2 V

RO Output Resistance f = 1 KHz 16 mΩ

Isc Short Circuit Current VI = 35 V TJ = 25°C 0.45 A

Iscp Short Circuit Peak Current TJ = 25°C 2.2 A

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Table 17: Electrical Characteristics Of L7809C (refer to the test circuits, TJ = 0 to 125°C, VI = 15V,IO = 500 mA, CI = 0.33 µF, CO = 0.1 µF unless otherwise specified).

(*) Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.

Table 18: Electrical Characteristics Of L7810C (refer to the test circuits, TJ = 0 to 125°C, VI = 16V,IO = 500 mA, CI = 0.33 µF, CO = 0.1 µF unless otherwise specified).

(*) Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.

Symbol Parameter Test Conditions Min. Typ. Max. Unit

VO Output Voltage TJ = 25°C 8.64 9 9.36 V

VO Output Voltage IO = 5 mA to 1 A PO ≤ 15WVI = 11.5 to 26 V

8.55 9 9.45 V

∆VO(*) Line Regulation VI = 11.5 to 26 V TJ = 25°C 180 mV

VI = 12 to 18 V TJ = 25°C 90

∆VO(*) Load Regulation IO = 5 mA to 1.5 A TJ = 25°C 180 mV

IO = 250 to 750 mA TJ = 25°C 90

Id Quiescent Current TJ = 25°C 8 mA

∆Id Quiescent Current Change IO = 5 mA to 1 A 0.5 mA

VI = 11.5 to 26 V 1

∆VO/∆T Output Voltage Drift IO = 5 mA -1 mV/°C

eN Output Noise Voltage B =10Hz to 100KHz TJ = 25°C 70 µV/VO

SVR Supply Voltage Rejection VI = 12 to 23 V f = 120Hz 55 dB

Vd Dropout Voltage IO = 1 A TJ = 25°C 2 V

RO Output Resistance f = 1 KHz 17 mΩIsc Short Circuit Current VI = 35 V TJ = 25°C 0.40 A

Iscp Short Circuit Peak Current TJ = 25°C 2.2 A

Symbol Parameter Test Conditions Min. Typ. Max. Unit

VO Output Voltage TJ = 25°C 9.6 10 10.4 V

VO Output Voltage IO = 5 mA to 1 A PO ≤ 15WVI = 12.5 to 26 V

9.5 10 10.5 V

∆VO(*) Line Regulation VI = 12.5 to 26 V TJ = 25°C 200 mV

VI = 13.5 to 19 V TJ = 25°C 100

∆VO(*) Load Regulation IO = 5 mA to 1.5 A TJ = 25°C 200 mV

IO = 250 to 750 mA TJ = 25°C 100

Id Quiescent Current TJ = 25°C 8 mA

∆Id Quiescent Current Change IO = 5 mA to 1 A 0.5 mA

VI = 12.5 to 26 V 1

∆VO/∆T Output Voltage Drift IO = 5 mA -1 mV/°C

eN Output Noise Voltage B =10Hz to 100KHz TJ = 25°C 70 µV/VO

SVR Supply Voltage Rejection VI = 13 to 23 V f = 120Hz 55 dB

Vd Dropout Voltage IO = 1 A TJ = 25°C 2 V

RO Output Resistance f = 1 KHz 17 mΩ

Isc Short Circuit Current VI = 35 V TJ = 25°C 0.40 A

Iscp Short Circuit Peak Current TJ = 25°C 2.2 A

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Table 19: Electrical Characteristics Of L7812C (refer to the test circuits, TJ = 0 to 125°C, VI = 19V,IO = 500 mA, CI = 0.33 µF, CO = 0.1 µF unless otherwise specified).

(*) Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.

Table 20: Electrical Characteristics Of L7815C (refer to the test circuits, TJ = 0 to 125°C, VI = 23V,IO = 500 mA, CI = 0.33 µF, CO = 0.1 µF unless otherwise specified).

(*) Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.

Symbol Parameter Test Conditions Min. Typ. Max. Unit

VO Output Voltage TJ = 25°C 11.5 12 12.5 V

VO Output Voltage IO = 5 mA to 1 A PO ≤ 15WVI = 14.5 to 27 V

11.4 12 12.6 V

∆VO(*) Line Regulation VI = 14.5 to 30 V TJ = 25°C 240 mV

VI = 16 to 22 V TJ = 25°C 120

∆VO(*) Load Regulation IO = 5 mA to 1.5 A TJ = 25°C 240 mV

IO = 250 to 750 mA TJ = 25°C 120

Id Quiescent Current TJ = 25°C 8 mA

∆Id Quiescent Current Change IO = 5 mA to 1 A 0.5 mA

VI = 14.5 to 30 V 1

∆VO/∆T Output Voltage Drift IO = 5 mA -1 mV/°C

eN Output Noise Voltage B =10Hz to 100KHz TJ = 25°C 75 µV/VO

SVR Supply Voltage Rejection VI = 15 to 25 V f = 120Hz 55 dB

Vd Dropout Voltage IO = 1 A TJ = 25°C 2 V

RO Output Resistance f = 1 KHz 18 mΩIsc Short Circuit Current VI = 35 V TJ = 25°C 0.35 A

Iscp Short Circuit Peak Current TJ = 25°C 2.2 A

Symbol Parameter Test Conditions Min. Typ. Max. Unit

VO Output Voltage TJ = 25°C 14.5 15 15.6 V

VO Output Voltage IO = 5 mA to 1 A PO ≤ 15WVI = 17.5 to 30 V

14.25 15 15.75 V

∆VO(*) Line Regulation VI = 17.5 to 30 V TJ = 25°C 300 mV

VI = 20 to 26 V TJ = 25°C 150

∆VO(*) Load Regulation IO = 5 mA to 1.5 A TJ = 25°C 300 mV

IO = 250 to 750 mA TJ = 25°C 150

Id Quiescent Current TJ = 25°C 8 mA

∆Id Quiescent Current Change IO = 5 mA to 1 A 0.5 mA

VI = 17.5 to 30 V 1

∆VO/∆T Output Voltage Drift IO = 5 mA -1 mV/°C

eN Output Noise Voltage B =10Hz to 100KHz TJ = 25°C 90 µV/VO

SVR Supply Voltage Rejection VI = 18.5 to 28.5 V f = 120Hz 54 dB

Vd Dropout Voltage IO = 1 A TJ = 25°C 2 V

RO Output Resistance f = 1 KHz 19 mΩ

Isc Short Circuit Current VI = 35 V TJ = 25°C 0.23 A

Iscp Short Circuit Peak Current TJ = 25°C 2.2 A

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Table 21: Electrical Characteristics Of L7818C (refer to the test circuits, TJ = 0 to 125°C, VI = 26V,IO = 500 mA, CI = 0.33 µF, CO = 0.1 µF unless otherwise specified).

(*) Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.

Table 22: Electrical Characteristics Of L7820C (refer to the test circuits, TJ = 0 to 125°C, VI = 28V,IO = 500 mA, CI = 0.33 µF, CO = 0.1 µF unless otherwise specified).

(*) Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.

Symbol Parameter Test Conditions Min. Typ. Max. Unit

VO Output Voltage TJ = 25°C 17.3 18 18.7 V

VO Output Voltage IO = 5 mA to 1 A PO ≤ 15WVI = 21 to 33 V

17.1 18 18.9 V

∆VO(*) Line Regulation VI = 21 to 33 V TJ = 25°C 360 mV

VI = 24 to 30 V TJ = 25°C 180

∆VO(*) Load Regulation IO = 5 mA to 1.5 A TJ = 25°C 360 mV

IO = 250 to 750 mA TJ = 25°C 180

Id Quiescent Current TJ = 25°C 8 mA

∆Id Quiescent Current Change IO = 5 mA to 1 A 0.5 mA

VI = 21 to 33 V 1

∆VO/∆T Output Voltage Drift IO = 5 mA -1 mV/°C

eN Output Noise Voltage B =10Hz to 100KHz TJ = 25°C 110 µV/VO

SVR Supply Voltage Rejection VI = 22 to 32 V f = 120Hz 53 dB

Vd Dropout Voltage IO = 1 A TJ = 25°C 2 V

RO Output Resistance f = 1 KHz 22 mΩIsc Short Circuit Current VI = 35 V TJ = 25°C 0.20 A

Iscp Short Circuit Peak Current TJ = 25°C 2.1 A

Symbol Parameter Test Conditions Min. Typ. Max. Unit

VO Output Voltage TJ = 25°C 19.2 20 20.8 V

VO Output Voltage IO = 5 mA to 1 A PO ≤ 15WVI = 23 to 35 V

19 20 21 V

∆VO(*) Line Regulation VI = 22.5 to 35 V TJ = 25°C 400 mV

VI = 26 to 32 V TJ = 25°C 200

∆VO(*) Load Regulation IO = 5 mA to 1.5 A TJ = 25°C 400 mV

IO = 250 to 750 mA TJ = 25°C 200

Id Quiescent Current TJ = 25°C 8 mA

∆Id Quiescent Current Change IO = 5 mA to 1 A 0.5 mA

VI = 23 to 35 V 1

∆VO/∆T Output Voltage Drift IO = 5 mA -1 mV/°C

eN Output Noise Voltage B =10Hz to 100KHz TJ = 25°C 150 µV/VO

SVR Supply Voltage Rejection VI = 24 to 35 V f = 120Hz 52 dB

Vd Dropout Voltage IO = 1 A TJ = 25°C 2 V

RO Output Resistance f = 1 KHz 24 mΩ

Isc Short Circuit Current VI = 35 V TJ = 25°C 0.18 A

Iscp Short Circuit Peak Current TJ = 25°C 2.1 A

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Table 23: Electrical Characteristics Of L7824C (refer to the test circuits, TJ = 0 to 125°C, VI = 33V,IO = 500 mA, CI = 0.33 µF, CO = 0.1 µF unless otherwise specified).

(*) Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.

Figure 8: Dropout Voltage vs Junction Temperature

Figure 9: Peak Output Current vs Input/output Differential Voltage

Symbol Parameter Test Conditions Min. Typ. Max. Unit

VO Output Voltage TJ = 25°C 23 24 25 V

VO Output Voltage IO = 5 mA to 1 A PO ≤ 15WVI = 27 to 38 V

22.8 24 25.2 V

∆VO(*) Line Regulation VI = 27 to 38 V TJ = 25°C 480 mV

VI = 30 to 36 V TJ = 25°C 240

∆VO(*) Load Regulation IO = 5 mA to 1.5 A TJ = 25°C 480 mV

IO = 250 to 750 mA TJ = 25°C 240

Id Quiescent Current TJ = 25°C 8 mA

∆Id Quiescent Current Change IO = 5 mA to 1 A 0.5 mA

VI = 27 to 38 V 1

∆VO/∆T Output Voltage Drift IO = 5 mA -1.5 mV/°C

eN Output Noise Voltage B =10Hz to 100KHz TJ = 25°C 170 µV/VO

SVR Supply Voltage Rejection VI = 28 to 38 V f = 120Hz 50 dB

Vd Dropout Voltage IO = 1 A TJ = 25°C 2 V

RO Output Resistance f = 1 KHz 28 mΩIsc Short Circuit Current VI = 35 V TJ = 25°C 0.15 A

Iscp Short Circuit Peak Current TJ = 25°C 2.1 A

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Figure 10: Supply Voltage Rejection vs Frequency

Figure 11: Output Voltage vs Junction Temperature

Figure 12: Output Impedance vs Frequency

Figure 13: Quiescent Current vs Junction Temperature

Figure 14: Load Transient Response

Figure 15: Line Transient Response

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Figure 16: Quiescent Current vs Input Voltage

Figure 17: Fixed Output Regulator

NOTE:1. To specify an output voltage, substitute voltage value for "XX".2. Although no output capacitor is need for stability, it does improve transient response.3. Required if regulator is locate an appreciable distance from power supply filter.

Figure 18: Current Regulator

VxxIO = + IdR1

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Figure 19: Circuit for Increasing Output Voltage

Figure 20: Adjustable Output Regulator (7 to 30V)

Figure 21: 0.5 to 10V Regulator

IR1 ≥ 5 Id

R2VO = VXX (1+ ) + Id R2 R1

R4VO = Vxx R1

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Figure 22: High Current Voltage Regulator

Figure 23: High Output Current with Short Circuit Protection

Figure 24: Tracking Voltage Regulator

VBEQ1R1 = IQ1IREQ - βQ1

VBEQ1IO = IREG + Q1 (IREG )R1

VBEQ2RSC = ISC

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Figure 25: Split Power Supply (± 15V - 1 A)

* Against potential latch-up problems.

Figure 26: Negative Output Voltage Circuit

Figure 27: Switching Regulator

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Figure 28: High Input Voltage Circuit

Figure 29: High Input Voltage Circuit

Figure 30: High Output Voltage Regulator

Figure 31: High Input and Output Voltage

VIN = VI - (VZ + VBE)

VO = VXX + VZ1

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Figure 32: Reducing Power Dissipation with Dropping Resistor

Figure 33: Remote Shutdown

Figure 34: Power AM Modulator (unity voltage gain, IO ≤ 0.5)

NOTE: The circuit performs well up to 100 KHz.

VI(min) - VXX - VDROP(max)R = IO(max) + Id(max)

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Figure 35: Adjustable Output Voltage with Temperature Compensation

NOTE: Q2 is connected as a diode in order to compensate the variation of the Q1 VBE with the temperature. C allows a slow rise time of the VO.

Figure 36: Light Controllers (VOmin = VXX + VBE)

Figure 37: Protection against Input Short-Circuit with High Capacitance Loads

Application with high capacitance loads and an output voltage greater than 6 volts need an external diode (see fig. 33) to protect the device against input short circuit. In this case the input voltage falls rapidly while the output voltage decrease slowly. The capacitance discharges by means of the Base-Emitter junction of the series pass transistor in the regulator. If the energy is sufficiently high, the transistor may be de-stroyed. The external diode by-passes the current from the IC to ground.

R2VO = VXX (1+ ) + VBE R1

VO rises when the light goes upVO falls when the light goes up

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DIM.mm. inch

MIN. TYP MAX. MIN. TYP. MAX.

A 11.85 0.466

B 0.96 1.05 1.10 0.037 0.041 0.043

C 1.70 0.066

D 8.7 0.342

E 20.0 0.787

G 10.9 0.429

N 16.9 0.665

P 26.2 1.031

R 3.88 4.09 0.152 0.161

U 39.5 1.555

V 30.10 1.185

TO-3 MECHANICAL DATA

P003C/C

E

B

R

C

DAP

G

N

VU

O

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L7800 SERIES

25/34

DIM.mm. inch

MIN. TYP MAX. MIN. TYP. MAX.

A 4.40 4.60 0.173 0.181

b 0.61 0.88 0.024 0.034

b1 1.15 1.70 0.045 0.067

c 0.49 0.70 0.019 0.027

D 15.25 15.75 0.600 0.620

E 10.0 10.40 0.393 0.409

e 2.4 2.7 0.094 0.106

e1 4.95 5.15 0.194 0.203

F 1.23 1.32 0.048 0.051

H1 6.2 6.6 0.244 0.260

J1 2.40 2.72 0.094 0.107

L 13.0 14.0 0.511 0.551

L1 3.5 3.93 0.137 0.154

L20 16.4 0.645

L30 28.9 1.138

φP 3.75 3.85 0.147 0.151

Q 2.65 2.95 0.104 0.116

TO-220 (A TYPE) MECHANICAL DATA

0015988/N

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L7800 SERIES

26/34

DIM.mm. inch

MIN. TYP MAX. MIN. TYP. MAX.

A 4.30 4.70 0.169 0.185

b 0.70 0.90 0.028 0.035

b1 1.42 1.62 0.056 0.064

c 0.45 0.60 0.018 0.024

D 15.70 0.618

E 9.80 10.20 0.386 0.402

e 2.54 0.100

e1 5.08 0.200

F 1.25 1.39 0.049 0.055

H1 6.5 0.256

J1 2.20 2.60 0.087 0.202

L 12.88 13.28 0.507 0.523

L1 3 0.118

L20 15.70 16.1 0.618 0.634

L30 28.9 1.138

φP 3.50 3.70 0.138 0.146

Q 2.70 2.90 0.106 0.114

TO-220 (C TYPE) MECHANICAL DATA

0015988/N

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L7800 SERIES

27/34

DIM.mm. inch

MIN. TYP MAX. MIN. TYP. MAX.

A 4.47 4.67 0.176 0.184

b 0.70 0.91 0.028 0.036

b1 1.17 1.37 0.046 0.054

c 0.31 0.53 0.012 0.021

D 14.60 15.70 0.575 0.618

E 9.96 10.36 0.392 0.408

e 2.54 0.100

e1 5.08 0.200

F 1.17 1.37 0.046 0.054

H1 6.1 6.8 0.240 0.268

J1 2.52 2.82 0.099 0.111

L 12.70 13.80 0.500 0.543

L1 3.20 3.96 0.126 0.156

L20 15.21 16.77 0.599 0.660

φP 3.73 3.94 0.147 0.155

Q 2.59 2.89 0.102 0.114

TO-220 (E TYPE) MECHANICAL DATA

7655923/A

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L7800 SERIES

28/34

DIM.mm. inch

MIN. TYP MAX. MIN. TYP. MAX.

A 4.40 4.60 0.173 0.181

B 2.5 2.7 0.098 0.106

D 2.5 2.75 0.098 0.108

E 0.45 0.70 0.017 0.027

F 0.75 1 0.030 0.039

F1 1.15 1.50 0.045 0.059

F2 1.15 1.50 0.045 0.059

G 4.95 5.2 0.194 0.204

G1 2.4 2.7 0.094 0.106

H 10.0 10.40 0.393 0.409

L2 16 0.630

L3 28.6 30.6 1.126 1.204

L4 9.8 10.6 0.385 0.417

L5 2.9 3.6 0.114 0.142

L6 15.9 16.4 0.626 0.645

L7 9 9.3 0.354 0.366

DIA. 3 3.2 0.118 0.126

TO-220FP MECHANICAL DATA

7012510A-H

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L7800 SERIES

29/34

DIM.mm. inch

MIN. TYP MAX. MIN. TYP. MAX.

A 4.50 4.90 0.177 0.193

B 2.34 2.74 0.092 0.108

D 2.56 2.96 0.101 0.117

E 0.45 0.50 0.60 0.018 0.020 0.024

F 0.70 0.90 0.028 0.035

F1 1.47 0.058

G 5.08 0.200

G1 2.34 2.54 2.74 0.092 0.100 0.108

H 9.96 10.36 0.392 0.408

L2 15.8 0.622

L4 9.45 10.05 0.372 0.396

L6 15.67 16.07 0.617 0.633

L7 8.99 9.39 0.354 0.370

L8 3.30 0.130

DIA. 3.08 3.28 0.121 0.129

TO-220FM MECHANICAL DATA

7012510C-H

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L7800 SERIES

30/34

DIM.mm. inch

MIN. TYP MAX. MIN. TYP. MAX.

A 4.4 4.6 0.173 0.181

A1 0.03 0.23 0.001 0.009

b 0.7 0.93 0.027 0.036

b2 1.14 1.7 0.044 0.067

c 0.45 0.6 0.017 0.023

c2 1.23 1.36 0.048 0.053

D 8.95 9.35 0.352 0.368

D1 8 0.315

E 10 10.4 0.393 0.409

E1 8.5 0.335

e 2.54 0.100

e1 4.88 5.28 0.192 0.208

H 15 15.85 0.590 0.624

J1 2.49 2.69 0.098 0.106

L 2.29 2.79 0.090 0.110

L1 1.27 1.4 0.050 0.055

L2 1.3 1.75 0.051 0.069

R 0.4 0.016

V2 0° 8° 0° 8°

D2PAK (A TYPE) MECHANICAL DATA

0079457/J

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L7800 SERIES

31/34

DIM.mm. inch

MIN. TYP MAX. MIN. TYP. MAX.

A 4.3 4.7 0.169 0.185

A1 0 0.20 0.000 0.008

b 0.70 0.90 0.028 0.035

b2 1.17 1.37 0.046 0.054

c 0.45 0.50 0.6 0.018 0.020 0.024

c2 1.25 1.30 1.40 0.049 0.051 0.055

D 9.0 9.2 9.4 0.354 0.362 0.370

D1 7.5 0.295

E 9.8 10.2 0.386 0.402

E1 7.5 0.295

e 2.54 0.100

e1 5.08 0.200

H 15 15.30 15.60 0.591 0.602 0.614

J1 2.20 2.60 0.087 0.102

L 1.79 2.79 0.070 0.110

L1 1.0 1.4 0.039 0.055

L2 1.2 1.6 0.047 0.063

R 0.3 0.012

V2 0° 3° 0° 3°

D2PAK (C TYPE) MECHANICAL DATA

0079457/J

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L7800 SERIES

32/34

DIM.mm. inch

MIN. TYP MAX. MIN. TYP. MAX.

A 180 7.086

C 12.8 13.0 13.2 0.504 0.512 0.519

D 20.2 0.795

N 60 2.362

T 14.4 0.567

Ao 10.50 10.6 10.70 0.413 0.417 0.421

Bo 15.70 15.80 15.90 0.618 0.622 0.626

Ko 4.80 4.90 5.00 0.189 0.193 0.197

Po 3.9 4.0 4.1 0.153 0.157 0.161

P 11.9 12.0 12.1 0.468 0.472 0.476

Tape & Reel D2PAK-P2PAK-D2PAK/A-P2PAK/A MECHANICAL DATA

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L7800 SERIES

33/34

Table 24: Revision History

Date Revision Description of Changes

09-Nov-2004 12 Add New Part Number.

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L7800 SERIES

34/34

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequencesof use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is grantedby implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subjectto change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are notauthorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

The ST logo is a registered trademark of STMicroelectronics

All other names are the property of their respective owners

© 2004 STMicroelectronics - All Rights Reserved

STMicroelectronics group of companies

Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America

www.st.com

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This datasheet has been download from:

www.datasheetcatalog.com

Datasheets for electronics components.

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BC

548 / BC

548A / B

C548B

/ BC

548C

NPN General Purpose Amplifier

BC548BC548ABC548BBC548C

This device is designed for use as general purpose amplifiersand switches requiring collector currents to 300 mA. Sourced fromProcess 10. See PN100A for characteristics.

Absolute Maximum Ratings* TA = 25°C unless otherwise noted

*These ratings are limiting values above which the serviceability of any semiconductor device may be impaired.

NOTES:1) These ratings are based on a maximum junction temperature of 150 degrees C.2) These are steady state limits. The factory should be consulted on applications involving pulsed or low duty cycle operations.

Thermal Characteristics TA = 25°C unless otherwise noted

Symbol Parameter Value UnitsVCEO Collector-Emitter Voltage 30 V

VCES Collector-Base Voltage 30 V

VEBO Emitter-Base Voltage 5.0 V

IC Collector Current - Continuous 500 mA

TJ, Tstg Operating and Storage Junction Temperature Range -55 to +150 °C

Symbol Characteristic Max UnitsBC548 / A / B / C

PD Total Device DissipationDerate above 25°C

6255.0

mWmW/°C

RθJC Thermal Resistance, Junction to Case 83.3 °C/W

RθJA Thermal Resistance, Junction to Ambient 200 °C/W

EB C

TO-92

1997 Fairchild Semiconductor Corporation 548-ABC, Rev B

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BC

548 / BC

548A / B

C548B

/ BC

548CNPN General Purpose Amplifier

(continued)

Electrical Characteristics TA = 25°C unless otherwise noted

OFF CHARACTERISTICS

Symbol Parameter Test C onditions Min Max Units

V(BR)CEO Collector-Emitter Breakdown Voltage IC = 10 mA, IB = 0 30 V

V(BR)CBO Collector-Base Breakdown Voltage IC = 10 µA, IE = 0 30 V

V(BR)CES Collector-Base Breakdown Voltage IC = 10 µA, IE = 0 30 V

V(BR)EBO Emitter-Base Breakdown Voltage IE = 10 µA, IC = 0 5.0 V

ICBO Collector Cutoff Current VCB = 30 V, IE = 0VCB = 30 V, IE = 0, TA = +150 °C

155.0

nAµA

ON CHARACTERISTICShFE DC Current Gain VCE = 5.0 V, IC = 2.0 mA 548

548A 548B

548C

110110200420

800220450800

VCE(sat) Collector-Emitter Saturation Voltage IC = 10 mA, IB = 0.5 mAIC = 100 mA, IB = 5.0 mA

0.250.60

VV

VBE(on) Base-Emitter On Voltage VCE = 5.0 V, IC = 2.0 mAVCE = 5.0 V, IC = 10 mA

0.58 0.700.77

VV

SMALL SIGNAL CHARACTERISTICShfe Small-Signal Current Gain IC = 2.0 mA, VCE = 5.0 V,

f = 1.0 kHz125 900

NF Noise Figure VCE = 5.0 V, IC = 200 µA,RS = 2.0 kΩ, f = 1.0 kHz,BW = 200 Hz

10 dB

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TRADEMARKSThe following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and isnot intended to be an exhaustive list of all such trademarks.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORTDEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.As used herein:1. Life support devices or systems are devices orsystems which, (a) are intended for surgical implant intothe body, or (b) support or sustain life, or (c) whosefailure to perform when properly used in accordancewith instructions for use provided in the labeling, can bereasonably expected to result in significant injury to theuser.

2. A critical component is any component of a lifesupport device or system whose failure to perform canbe reasonably expected to cause the failure of the lifesupport device or system, or to affect its safety oreffectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Obsolete

This datasheet contains the design specifications forproduct development. Specifications may change inany manner without notice.

This datasheet contains preliminary data, andsupplementary data will be published at a later date.Fairchild Semiconductor reserves the right to makechanges at any time without notice in order to improvedesign.

This datasheet contains final specifications. FairchildSemiconductor reserves the right to make changes atany time without notice in order to improve design.

This datasheet contains specifications on a productthat has been discontinued by Fairchild semiconductor.The datasheet is printed for reference information only.

Formative orIn Design

First Production

Full Production

Not In Production

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHERNOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILDDOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCTOR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENTRIGHTS, NOR THE RIGHTS OF OTHERS.

PowerTrenchQFET™QS™QT Optoelectronics™Quiet Series™SILENT SWITCHERSMART START™SuperSOT™-3SuperSOT™-6SuperSOT™-8

FASTr™GlobalOptoisolator™GTO™HiSeC™ISOPLANAR™MICROWIRE™OPTOLOGIC™OPTOPLANAR™PACMAN™POP™

Rev. G

ACEx™Bottomless™CoolFET™CROSSVOLT™DOME™E2CMOSTM

EnSignaTM

FACT™FACT Quiet Series™FAST

SyncFET™TinyLogic™UHC™VCX™

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This datasheet has been download from:

www.datasheetcatalog.com

Datasheets for electronics components.

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©2001 Fairchild Semiconductor Corporation Rev. A1, June 2001

TIP120/121/122

NPN Epitaxial Darlington TransistorAbsolute Maximum Ratings TC=25°C unless otherwise noted

Electrical Characteristics TC=25°C unless otherwise noted

* Pulse Test : PW≤300µs, Duty cycle ≤2%

Symbol Parameter Value UnitsVCBO Collector-Base Voltage : TIP120

: TIP121 : TIP122

6080

100

VVV

VCEO Collector-Emitter Voltage : TIP120 : TIP121 : TIP122

6080

100

VVV

VEBO Emitter-Base Voltage 5 VIC Collector Current (DC) 5 AICP Collector Current (Pulse) 8 AIB Base Current (DC) 120 mAPC Collector Dissipation (Ta=25°C) 2 W

Collector Dissipation (TC=25°C) 65 WTJ Junction Temperature 150 °CTSTG Storage Temperature - 65 ~ 150 °C

Symbol Parameter Test Condition Min. Max. Units VCEO(sus) Collector-Emitter Sustaining Voltage

: TIP120: TIP121: TIP122

IC = 100mA, IB = 0 60

80100

VVV

ICEO Collector Cut-off Current : TIP120: TIP121: TIP122

VCE = 30V, IB = 0 VCE = 40V, IB = 0 VCE = 50V, IB = 0

0.50.50.5

mAmAmA

ICBO Collector Cut-off Current : TIP120: TIP121: TIP122

VCB = 60V, IE = 0 VCB = 80V, IE = 0 VCB = 100V, IE = 0

0.20.20.2

mAmAmA

IEBO Emitter Cut-off Current VBE = 5V, IC = 0 2 mA

hFE * DC Current Gain VCE = 3V,IC = 0.5A VCE = 3V, IC = 3A

10001000

VCE(sat) * Collector-Emitter Saturation Voltage IC = 3A, IB = 12mA IC = 5A, IB = 20mA

2.04.0

VV

VBE(on) * Base-Emitter ON Voltage VCE = 3V, IC = 3A 2.5 V Cob Output Capacitance VCB = 10V, IE = 0, f = 0.1MHz 200 pF

TIP120/121/122

Medium Power Linear Switching Applications• Complementary to TIP125/126/127

Equivalent Circuit

B

E

C

R1 R2

R1 8kΩ≅R2 0.12kΩ≅

1.Base 2.Collector 3.Emitter

1 TO-220

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©2001 Fairchild Semiconductor Corporation

TIP120/121/122

Rev. A1, June 2001

Typical characteristics

Figure 1. DC current Gain Figure 2. Base-Emitter Saturation Voltage Collector-Emitter Saturation Voltage

Figure 3. Output and Input Capacitance vs. Reverse Voltage

Figure 4. Safe Operating Area

Figure 5. Power Derating

0.1 1 10100

1000

10000

VCE = 4V

h F

E, D

C C

UR

REN

T G

AIN

IC[A], COLLECTOR CURRENT

0.1 1 100.5

1.0

1.5

2.0

2.5

3.0

3.5 IC = 250IB

VCE(sat)

VBE(sat)

V BE(

sat),

VC

E(s

at)[V

], SA

TUR

ATIO

N V

OLT

AGE

IC[A], COLLECTOR CURRENT

0.1 1 10 10010

100

1000

Cob

f=0.1MHz

VCB[V], COLLECTOR-BASE VOLTAGEVEB[V], EMITTER-BASE VOLTAGE

Cob

[pF]

Cib[p

F], C

APAC

ITAN

CE

Cib

1 10 1000.01

0.1

1

10

TIP121

TIP122

TIP120

DC5ms

100us500us

1ms

I C

[A],

CO

LLEC

TOR

CU

RR

ENT

VCE[V], COLLECTOR-EMITTER VOLTAGE

0 25 50 75 100 125 150 1750

10

20

30

40

50

60

70

80

P C[W

], PO

WER

DIS

SIPA

TIO

N

TC[oC], CASE TEMPERATURE

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Package Demensions

©2001 Fairchild Semiconductor Corporation Rev. A1, June 2001

TIP120/121/122

Dimensions in Millimeters

4.50 ±0.209.90 ±0.20

1.52 ±0.10

0.80 ±0.102.40 ±0.20

10.00 ±0.20

1.27 ±0.10

ø3.60 ±0.10

(8.70)

2.8

0 ±

0.1

015.9

0 ±

0.2

0

10.0

8 ±

0.3

018.9

5M

AX

.

(1.7

0)

(3.7

0)

(3.0

0)

(1.4

6)

(1.0

0)

(45°)

9.2

0 ±

0.2

013.0

8 ±

0.2

0

1.3

0 ±

0.1

0

1.30+0.10–0.05

0.50+0.10–0.05

2.54TYP[2.54 ±0.20]

2.54TYP[2.54 ±0.20]

TO-220

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DISCLAIMERFAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANYPRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANYLIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORTDEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTORCORPORATION.As used herein:

©2001 Fairchild Semiconductor Corporation Rev. H3

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is notintended to be an exhaustive list of all such trademarks.

1. Life support devices or systems are devices or systemswhich, (a) are intended for surgical implant into the body,or (b) support or sustain life, or (c) whose failure to performwhen properly used in accordance with instructions for useprovided in the labeling, can be reasonably expected toresult in significant injury to the user.

2. A critical component is any component of a life supportdevice or system whose failure to perform can bereasonably expected to cause the failure of the life supportdevice or system, or to affect its safety or effectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or In Design

This datasheet contains the design specifications forproduct development. Specifications may change inany manner without notice.

Preliminary First Production This datasheet contains preliminary data, andsupplementary data will be published at a later date.Fairchild Semiconductor reserves the right to makechanges at any time without notice in order to improvedesign.

No Identification Needed Full Production This datasheet contains final specifications. FairchildSemiconductor reserves the right to make changes atany time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a productthat has been discontinued by Fairchild semiconductor.The datasheet is printed for reference information only.

ACEx™Bottomless™CoolFET™CROSSVOLT™DenseTrench™DOME™EcoSPARK™E2CMOS™EnSigna™FACT™FACT Quiet Series™

FAST®

FASTr™FRFET™GlobalOptoisolator™GTO™HiSeC™ISOPLANAR™LittleFET™MicroFET™MICROWIRE™OPTOLOGIC™

OPTOPLANAR™PACMAN™POP™Power247™PowerTrench®

QFET™QS™QT Optoelectronics™Quiet Series™SLIENT SWITCHER®

SMART START™

STAR*POWER™Stealth™SuperSOT™-3SuperSOT™-6SuperSOT™-8SyncFET™TruTranslation™TinyLogic™UHC™UltraFET®

VCX™

STAR*POWER is used under license

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This datasheet has been download from:

www.datasheetcatalog.com

Datasheets for electronics components.

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©2001 Fairchild Semiconductor Corporation Rev. A1, June 2001

TIP125/126/127

PNP Epitaxial Darlington TransistorAbsolute Maximum Ratings TC=25°C unless otherwise noted

Electrical Characteristics TC=25°C unless otherwise noted

* Pulse Test : PW≤300µs, Duty cycle ≤2%

Symbol Parameter Value Units VCBO Collector-Base Voltage : TIP125

: TIP126 : TIP127

- 60 - 80 - 100

VVV

VCEO

Collector-Emitter Voltage : TIP125 : TIP126 : TIP127

- 60 - 80 - 100

VVV

VEBO Emitter-Base Voltage - 5 V IC Collector Current (DC) - 5 A ICP Collector Current (Pulse) - 8 A IB Base Current (DC) - 120 mA PC Collector Dissipation (Ta=25°C) 2 W

Collector Dissipation (TC=25°C) 65 W TJ Junction Temperature 150 °C TSTG Storage Temperature - 65 ~ 150 °C

Symbol Parameter Test Condition Min. Max. Units VCEO(sus) Collector-Emitter Sustaining Voltage

: TIP125: TIP126: TIP127

IC = -100mA, IB = 0 -60

-80-120

VVV

ICEO Collector Cut-off Current : TIP125: TIP126: TIP127

VCE = -30V, IB = 0 VCE = -40V, IB = 0 VCE = -50V, IB = 0

-2 -2 -2

mAmAmA

ICBO Collector Cut-off Current : TIP125: TIP126: TIP127

VCB = -60V, IE = 0 VCB = -80V, IE = 0 VCB = -100V, IE = 0

-1 -1 -1

mAmAmA

IEBO Emitter Cut-off Current VBE = -5V, IC = 0 -2 mA

hFE * DC Current Gain VCE = -3V, IC = 0.5A VCE = -3V, IC = -3A

10001000

VCE(sat) * Collector-Emitter Saturation Voltage IC = -3A, IB = -12mA IC=-5A, IB=-20mA

-2 -4

VV

VBE(on) * Base-Emitter ON Voltage VCE = -3V, IC = -3A -2.5 V Cob Output Capacitance VCB = -10V, IE = 0, f = 0.1MHz 300 pF

TIP125/126/127

Medium Power Linear Switching Applications• Complementary to TIP120/121/122

Equivalent Circuit

B

E

C

R1 R2

R1 8kΩ≅R2 0.12kΩ≅

1.Base 2.Collector 3.Emitter

1 TO-220

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©2001 Fairchild Semiconductor Corporation

TIP125/126/127

Rev. A1, June 2001

Typical Characteristics

Figure 1. DC current Gain Figure 2. Base-Emitter Saturation Voltage Collector-Emitter Saturation Voltage

Figure 3. Output and Input Capacitance vs. Reverse Voltage

Figure 4. Safe Operating Area

Figure 5. Power Derating

-0.1 -1 -10100

1k

10k

VCE = 4V

h F

E, D

C C

UR

REN

T G

AIN

IC[A], COLLECTOR CURRENT

-0.1 -1 -10-0.5

-1.0

-1.5

-2.0

-2.5

-3.0

-3.5 IC = 250IB

VCE(sat)

VBE(sat)

V BE(

sat),

VC

E(sa

t)[V]

, SAT

UR

ATIO

N V

OLT

AGE

IC[A], COLLECTOR CURRENT

-0.1 -1 -10 -10010

100

1000

Cob

f = 0.1MHz

VCB[V], COLLECTOR-BASE VOLTAGEVEB[V], EMITTER-BASE VOLTAGE

Cob

[pF]

Cib[p

F], C

APAC

ITAN

CE

Cib

-1 -10 -100-0.01

-0.1

-1

-10

TIP126

TIP127

TIP125

DC

5ms

100us500us1ms

I C

[A],

CO

LLEC

TOR

CU

RR

ENT

VCE[V], COLLECTOR-EMITTER VOLTAGE

0 25 50 75 100 125 150 1750

15

30

45

60

75

90

P C[W

], PO

WER

DIS

SIPA

TIO

N

TC[oC], CASE TEMPERATURE

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Package Demensions

©2001 Fairchild Semiconductor Corporation Rev. A1, June 2001

TIP125/126/127

Dimensions in Millimeters

4.50 ±0.209.90 ±0.20

1.52 ±0.10

0.80 ±0.102.40 ±0.20

10.00 ±0.20

1.27 ±0.10

ø3.60 ±0.10

(8.70)

2.8

0 ±

0.1

015.9

0 ±

0.2

0

10.0

8 ±

0.3

018.9

5M

AX

.

(1.7

0)

(3.7

0)

(3.0

0)

(1.4

6)

(1.0

0)

(45°)

9.2

0 ±

0.2

013.0

8 ±

0.2

0

1.3

0 ±

0.1

0

1.30+0.10–0.05

0.50+0.10–0.05

2.54TYP[2.54 ±0.20]

2.54TYP[2.54 ±0.20]

TO-220

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DISCLAIMERFAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANYPRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANYLIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORTDEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTORCORPORATION.As used herein:

©2001 Fairchild Semiconductor Corporation Rev. H3

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is notintended to be an exhaustive list of all such trademarks.

1. Life support devices or systems are devices or systemswhich, (a) are intended for surgical implant into the body,or (b) support or sustain life, or (c) whose failure to performwhen properly used in accordance with instructions for useprovided in the labeling, can be reasonably expected toresult in significant injury to the user.

2. A critical component is any component of a life supportdevice or system whose failure to perform can bereasonably expected to cause the failure of the life supportdevice or system, or to affect its safety or effectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or In Design

This datasheet contains the design specifications forproduct development. Specifications may change inany manner without notice.

Preliminary First Production This datasheet contains preliminary data, andsupplementary data will be published at a later date.Fairchild Semiconductor reserves the right to makechanges at any time without notice in order to improvedesign.

No Identification Needed Full Production This datasheet contains final specifications. FairchildSemiconductor reserves the right to make changes atany time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a productthat has been discontinued by Fairchild semiconductor.The datasheet is printed for reference information only.

ACEx™Bottomless™CoolFET™CROSSVOLT™DenseTrench™DOME™EcoSPARK™E2CMOS™EnSigna™FACT™FACT Quiet Series™

FAST®

FASTr™FRFET™GlobalOptoisolator™GTO™HiSeC™ISOPLANAR™LittleFET™MicroFET™MICROWIRE™OPTOLOGIC™

OPTOPLANAR™PACMAN™POP™Power247™PowerTrench®

QFET™QS™QT Optoelectronics™Quiet Series™SLIENT SWITCHER®

SMART START™

STAR*POWER™Stealth™SuperSOT™-3SuperSOT™-6SuperSOT™-8SyncFET™TruTranslation™TinyLogic™UHC™UltraFET®

VCX™

STAR*POWER is used under license

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This datasheet has been download from:

www.datasheetcatalog.com

Datasheets for electronics components.

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© 2000 Fairchild Semiconductor Corporation DS006353 www.fairchildsemi.com

August 1986

Revised March 2000

DM

74LS

14 Hex In

verter with

Sch

mitt Trig

ger In

pu

ts

DM74LS14Hex Inverter with Schmitt Trigger Inputs

General DescriptionThis device contains six independent gates each of whichperforms the logic INVERT function. Each input has hyster-esis which increases the noise immunity and transforms aslowly changing input signal to a fast changing, jitter freeoutput.

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram Function TableY = A

H = HIGH Logic LevelL = LOW Logic Level

Order Number Package Number Package Description

DM74LS14M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow

DM74LS14SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

DM74LS14N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Input Output

A Y

L H

H L

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www.fairchildsemi.com 2

DM

74L

S14 Absolute Maximum Ratings(Note 1)

Note 1: The “Absolute Maximum Ratings” are those values beyond whichthe safety of the device cannot be guaranteed. The device should not beoperated at these limits. The parametric values defined in the ElectricalCharacteristics tables are not guaranteed at the absolute maximum ratings.The “Recommended Operating Conditions” table will define the conditionsfor actual device operation.

Recommended Operating Conditions

Note 2: VCC = 5V.

Electrical Characteristicsover recommended operating free air temperature range (unless otherwise noted)

Note 3: All typicals are at VCC = 5V, TA = 25°C.

Note 4: Not more than one output should be shorted at a time, and the duration should not exceed one second.

Switching Characteristics at VCC = 5V and TA = 25°C

Supply Voltage 7V

Input Voltage 7V

Operating Free Air Temperature Range 0°C to +70°C

Storage Temperature Range −65°C to +150°C

Symbol Parameter Min Nom Max Units

VCC Supply Voltage 4.75 5 5.25 V

VT+ Positive-Going Input Threshold Voltage (Note 2) 1.4 1.6 1.9 V

VT− Negative-Going Input Threshold Voltage (Note 2) 0.5 0.8 1 V

HYS Input Hysteresis (Note 2) 0.4 0.8 V

IOH HIGH Level Output Current −0.4 mA

IOL LOW Level Output Current 8 mA

TA Free Air Operating Temperature 0 70 °C

Symbol Parameter Conditions MinTyp

Max Units(Note 3)

VI Input Clamp Voltage VCC = Min, II = −18 mA −1.5 V

VOH HIGH Level VCC = Min, IOH = Max2.7 3.4 V

Output Voltage VIL = Max

VOL LOW Level VCC = Min, IOL = Max0.35 0.5

Output Voltage VIH = Min V

VCC = Min, IOL = 4 mA 0.25 0.4

IT+ Input Current at VCC = 5V, VI = VT+ −0.14 mA

Positive-Going Threshold

IT− Input Current at VCC = 5V, VI = VT− −0.18 mA

Negative-Going Threshold

II Input Current @ Max Input Voltage VCC = Max, VI = 7V 0.1 mA

IIH HIGH Level Input Current VCC = Max, VI = 2.7V 20 µA

IIL LOW Level Input Current VCC = Max, VI = 0.4V −0.4 mA

IOS Short Circuit Output Current VCC = Max (Note 4) −20 −100 mA

ICCH Supply Current with Outputs HIGH VCC = Max 8.6 16 mA

ICCL Supply Current with Outputs LOW VCC = Max 12 21 mA

RL = 2 kΩ

Symbol Parameter CL = 15 pF CL = 50 pF Units

Min Max Min Max

tPLH Propagation Delay Time5 22 8 25 ns

LOW-to-HIGH Level Output

tPHL Propagation Delay Time5 22 10 33 ns

HIGH-to-LOW Level Output

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3 www.fairchildsemi.com

DM

74LS

14Physical Dimensions inches (millimeters) unless otherwise noted

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 NarrowPackage Number M14A

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www.fairchildsemi.com 4

DM

74L

S14 Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm WidePackage Number M14D

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5 www.fairchildsemi.com

DM

74LS

14 Hex In

verter with

Sch

mitt Trig

ger In

pu

tsPhysical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 WidePackage Number N14A

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied andFairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORTDEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILDSEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systemswhich, (a) are intended for surgical implant into thebody, or (b) support or sustain life, and (c) whose failureto perform when properly used in accordance withinstructions for use provided in the labeling, can be rea-sonably expected to result in a significant injury to theuser.

2. A critical component in any component of a life supportdevice or system whose failure to perform can be rea-sonably expected to cause the failure of the life supportdevice or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

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This datasheet has been downloaded from:

www.DatasheetCatalog.com

Datasheets for electronic components.

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TL/F/10172

DM

74LS48

BC

Dto

7-S

egm

entD

ecoder

January 1992

DM74LS48BCD to 7-Segment Decoder

General DescriptionThe ’LS48 translates four lines of BCD (8421) input data

into the 7-segment numeral code and provides seven corre-

sponding outputs having pull-up resistors, as opposed to

totem pole pull-ups. These outputs can serve as logic sig-

nals, with a HIGH output corresponding to a lighted lamp

segment, or can provide a 1.3 mA base current to npn lamp

driver transistors. Auxiliary inputs provide lamp test, blank-

ing and cascadable zero-suppression functions.

The ’LS48 decodes the input data in the pattern indicated in

the Truth Table and the segment identification illustration.

Connection Diagram

Dual-In-Line Package

TL/F/10172–1

Order Number DM74LS48M or DM74LS48N

See NS Package Number M16A or N16E

C1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.

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Absolute Maximum Ratings (Note)

Supply Voltage 7V

Input Voltage 7V

Operating Free Air Temperature Range

DM74LS 0§C to a70§CStorage Temperature Range b65§C to a150§C

Note: The ‘‘Absolute Maximum Ratings’’ are those valuesbeyond which the safety of the device cannot be guaran-teed. The device should not be operated at these limits. Theparametric values defined in the ‘‘Electrical Characteristics’’table are not guaranteed at the absolute maximum ratings.The ‘‘Recommended Operating Conditions’’ table will definethe conditions for actual device operation .

Recommended Operating Conditions

Symbol ParameterDM74LS48

UnitsMin Nom Max

VCC Supply Voltage 4.75 5 5.25 V

VIH High Level Input Voltage 2 V

VIL Low Level Input Voltage 0.8 V

IOH High Level Output Current b50 mA

IOL Low Level Output Current 6.0 mA

TA Free Air Operating Temperature 0 70 §C

Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)

Symbol Parameter Conditions MinTyp

Max Units(Note 1)

VI Input Clamp Voltage VCC e Min, II e b18 mA b1.5 V

VOH High Level Output VCC Min, IOH e Max,2.4 V

Voltage VIL e Max

IOFF Output High Current VCC e Min, VO e 0.85Vb1.3 mA

Segment Outputs

VOL Low Level Output VCC e Min, IOL e Max,0.5

Voltage VIH e Min V

IOL e 2.0 mA, VCC e Min 0.4

II Input Current @ Max VCC e Max, VI e 7V0.1 mA

Input Voltage

IIH High Level Input Current VCC e Max, VI e 2.7V 20 mA

IIL Low Level Input Current VCC e Max, VI e 0.4V b0.4 mA

IOS Short Circuit VCC e Max, VO e 0Vb0.3 b2 mA

Output Current at BI/RBO (Note 2)

ICCH Supply Current VCC e Max, VIN e 4.5V 38 mA

Note 1: All typicals are at VCC e 5V, TA e 25§C.

Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second.

Switching Characteristics at VCC e 5V and TA e 25§C

Symbol ParameterCL e 15 pF

UnitsMin Max

tPLH Propagation Delay Time 100ns

tPHL An to a–g 100

tPLH Propagation Delay Time 100ns

tPHL RBI to a–f 100

Note: LT e HIGH, A0–A3 e HIGH.

2

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Numerical DesignationsÐResultant Displays

TL/F/10172–4

Truth Table

Decimal Inputs Outputs

Or

FunctionLT RBI A3 A2 A1 A0 BI/RBO a b c d e f g

0 (Note 1) H H L L L L H H H H H H H L

1 (Note 1) H X L L L H H L H H L L L L

2 H X L L H L H H H L H H L H

3 H X L L H H H H H H H L L H

4 H X L H L L H L H H L L H H

5 H X L H L H H H L H H L H H

6 H X L H H L H L L H H H H H

7 H X L H H H H H H H L L L L

8 H X H L L L H H H H H H H H

9 H X H L L H H H H H L L H H

10 H X H L H L H L L L H H L H

11 H X H L H H H L L H H L L H

12 H X H H L L H L H L L L H H

13 H X H H L H H H L L H L H H

14 H X H H H L H L L L H H H H

15 H X H H H H H L L L L L L L

BI (Note 2) X X X X X X L L L L L L L L

RBI (Note 3) H L L L L L L L L L L L L L

LT (Note 4) L X X X X X H H H H H H H H

Note 1: BI/RBO is wired-AND logic serving as blanking input (BI) and/or ripple-blanking output (RBO). The blanking out (BI) must be open or held at a HIGH level

when output functions 0 through 15 are desired, and ripple-blanking input (RBI) must be open or at a HIGH level if blanking of a decimal 0 is not desired. X e input

may be HIGH or LOW.

Note 2: When a LOW level is applied to the blanking input (forced condition) all segment outputs go to a LOW level, regardless of the state of any other input

condition.

Note 3: When ripple-blanking input (RBI) and inputs A0, A1, A2, and A3 are at LOW level, with the lamp test input at HIGH level, all segment outputs go to a LOW

level and the ripple-blanking output (RBO) goes to a LOW level (response condition).

Note 4: When the blanking input/ripple-blanking output (BI/RBO) is open or held at a HIGH level, and a LOW level is applied to lamp test input, all segment outputs

go to a HIGH level.

Logic Symbol

TL/F/10172–2

VCC e Pin 16

GND e Pin 8

3

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Logic Diagram

TL/F/10172–3

4

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Physical Dimensions inches (millimeters)

16-Lead Small Outline Molded Package (M)

Order Number DM74LS48M

NS Package Number M16A

5

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DM

74LS48

BC

Dto

7-S

egm

entD

ecoder

Physical Dimensions inches (millimeters) (Continued)

16-Lead Molded Dual-In-Line Package (N)

Order Number DM74LS48N

NS Package Number N16E

LIFE SUPPORT POLICY

NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or 2. A critical component is any component of a life

systems which, (a) are intended for surgical implant support device or system whose failure to perform can

into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life

failure to perform, when properly used in accordance support device or system, or to affect its safety or

with instructions for use provided in the labeling, can effectiveness.

be reasonably expected to result in a significant injury

to the user.

National Semiconductor National Semiconductor National Semiconductor National SemiconductorCorporation Europe Hong Kong Ltd. Japan Ltd.1111 West Bardin Road Fax: (a49) 0-180-530 85 86 13th Floor, Straight Block, Tel: 81-043-299-2309Arlington, TX 76017 Email: cnjwge@ tevm2.nsc.com Ocean Centre, 5 Canton Rd. Fax: 81-043-299-2408Tel: 1(800) 272-9959 Deutsch Tel: (a49) 0-180-530 85 85 Tsimshatsui, KowloonFax: 1(800) 737-7018 English Tel: (a49) 0-180-532 78 32 Hong Kong

Fran3ais Tel: (a49) 0-180-532 93 58 Tel: (852) 2737-1600Italiano Tel: (a49) 0-180-534 16 80 Fax: (852) 2736-9960

National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.

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This datasheet has been download from:

www.datasheetcatalog.com

Datasheets for electronics components.

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© 2000 Fairchild Semiconductor Corporation DS006381 www.fairchildsemi.com

August 1986

Revised March 2000

DM

74LS

90 Decad

e and

Bin

ary Co

un

ters

DM74LS90Decade and Binary Counters

General DescriptionEach of these monolithic counters contains four master-slave flip-flops and additional gating to provide a divide-by-two counter and a three-stage binary counter for which thecount cycle length is divide-by-five for the DM74LS90.

All of these counters have a gated zero reset and theDM74LS90 also has gated set-to-nine inputs for use inBCD nine’s complement applications.

To use their maximum count length (decade or four bitbinary), the B input is connected to the QA output. Theinput count pulses are applied to input A and the outputsare as described in the appropriate truth table. A symmetri-cal divide-by-ten count can be obtained from theDM74LS90 counters by connecting the QD output to the Ainput and applying the input count to the B input whichgives a divide-by-ten square wave at output QA.

Features Typical power dissipation 45 mW

Count frequency 42 MHz

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram Reset/Count Truth Table

Order Number Package Number Package Description

DM74LS90M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow

DM74LS90N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Reset Inputs Output

R0(1) R0(2) R9(1) R9(2) QD QC QB QA

H H L X L L L L

H H X L L L L L

X X H H H L L H

X L X L COUNT

L X L X COUNT

L X X L COUNT

X L L X COUNT

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S90 Function Tables

BCD Count Sequence (Note 1)

Bi-Quinary (5-2) (Note 2)

H = HIGH LevelL = LOW LevelX = Don’t Care

Note 1: Output QA is connected to input B for BCD count.

Note 2: Output QD is connected to input A for bi-quinary count.

Note 3: Output QA is connected to input B.

Logic Diagram

The J and K inputs shown without connection are for reference only andare functionally at a high level.

Count Output

QD QC QB QA

0 L L L L

1 L L L H

2 L L H L

3 L L H H

4 L H L L

5 L H L H

6 L H H L

7 L H H H

8 H L L L

9 H L L H

Count Output

QA QD QC QB

0 L L L L

1 L L L H

2 L L H L

3 L L H H

4 L H L L

5 H L L L

6 H L L H

7 H L H L

8 H L H H

9 H H L L

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3 www.fairchildsemi.com

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90Absolute Maximum Ratings(Note 4)

Note 4: The “Absolute Maximum Ratings” are those values beyond whichthe safety of the device cannot be guaranteed. The device should not beoperated at these limits. The parametric values defined in the “ElectricalCharacteristics” table are not guaranteed at the absolute maximum ratings.The “Recommended Operating Conditions” table will define the conditionsfor actual device operation.

Recommended Operating Conditions

Note 5: CL = 15 pF, RL = 2 kΩ, TA = 25°C and VCC = 5V.

Note 6: CL = 50 pF, RL = 2 kΩ, TA = 25°C and VCC = 5V.

Electrical Characteristicsover recommended operating free air temperature range (unless otherwise noted)

Note 7: All typicals are at VCC = 5V, TA = 25°C.

Supply Voltage 7V

Input Voltage (Reset) 7V

Input Voltage (A or B) 5.5V

Operating Free Air Temperature Range 0°C to +70°CStorage Temperature Range −65°C to +150°C

Symbol Parameter Min Nom Max Units

VCC Supply Voltage 4.75 5 5.25 V

VIH HIGH Level Input Voltage 2 V

VIL LOW Level Input Voltage 0.8 V

IOH HIGH Level Output Current −0.4 mA

IOL LOW Level Output Current 8 mA

fCLK Clock Frequency (Note 5) A to QA 0 32 MHz

B to QB 0 16

fCLK Clock Frequency (Note 6) A to QA 0 20 MHz

B to QB 0 10

tW Pulse Width (Note 5) A 15

B 30 ns

Reset 15

tW Pulse Width (Note 6) A 25

B 50 ns

Reset 25

tREL Reset Release Time (Note 5) 25 ns

tREL Reset Release Time (Note 6) 35 ns

TA Free Air Operating Temperature 0 70 °C

Symbol Parameter Conditions MinTyp

Max Units(Note 7)

VI Input Clamp Voltage VCC = Min, II = −18 mA −1.5 V

VOH HIGH Level VCC = Min, IOH = Max2.7 3.4 V

Output Voltage VIL = Max, VIH = Min

VOL LOW Level VCC = Min, IOL = Max(Note 8)

VOutput Voltage VIL = Max, VIH = Min 0.35 0.5

IOL = 4 mA, VCC = Min 0.25 0.4

II Input Current @ Max VCC = Max, VI = 7V Reset 0.1

mAInput Voltage VCC = Max A 0.2

VI = 5.5V B 0.4

IIH HIGH Level VCC = Max, VI = 2.7V Reset 20

µAInput Current A 40

B 80

IIL LOW Level VCC = Max, VI = 0.4V Reset −0.4

mAInput Current A −2.4

B −3.2

IOS Short Circuit Output Current VCC = Max (Note 9) −20 −100 mA

ICC Supply Current VCC = Max (Note 7) 9 15 mA

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74L

S90 Electrical Characteristics (Continued)

Note 8: QA outputs are tested at IOL = Max plus the limit value of IIL for the B input. This permits driving the B input while maintaining full fan-out capability.

Note 9: Not more than one output should be shorted at a time, and the duration should not exceed one second.

Note 10: ICC is measured with all outputs open, both RO inputs grounded following momentary connection to 4.5V and all other inputs grounded.

Switching Characteristics at VCC = 5V and TA = 25°C

From (Input) RL = 2 kΩ

Symbol Parameter To (Output) CL = 15 pF CL = 50 pF Units

Min Max Min Max

fMAX Maximum Clock A to QA 32 20MHz

Frequency B to QB 16 10

tPLH Propagation Delay TimeA to QA 16 20 ns

LOW-to-HIGH Level Output

tPHL Propagation Delay TimeA to QA 18 24 ns

HIGH-to-LOW Level Output

tPLH Propagation Delay TimeA to QD 48 52 ns

LOW-to-HIGH Level Output

tPHL Propagation Delay TimeA to QD 50 60 ns

HIGH-to-LOW Level Output

tPLH Propagation Delay TimeB to QB 16 23 ns

LOW-to-HIGH Level Output

tPHL Propagation Delay TimeB to QB 21 30 ns

HIGH-to-LOW Level Output

tPLH Propagation Delay TimeB to QC 32 37 ns

LOW-to-HIGH Level Output

tPHL Propagation Delay TimeB to QC 35 44 ns

HIGH-to-LOW Level Output

tPLH Propagation Delay TimeB to QD 32 36 ns

LOW-to-HIGH Level Output

tPHL Propagation Delay TimeB to QD 35 44 ns

HIGH-to-LOW Level Output

tPLH Propagation Delay TimeSET-9 to QA, QD 30 35 ns

LOW-to-HIGH Level Output

tPHL Propagation Delay TimeSET-9 to QB, QC 40 48 ns

HIGH-to-LOW Level Output

tPHL Propagation Delay TimeSET-0 to Any Q 40 52 ns

HIGH-to-LOW Level Output

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5 www.fairchildsemi.com

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74LS

90Physical Dimensions inches (millimeters) unless otherwise noted

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 NarrowPackage Number M14A

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74L

S90

Dec

ade

and

Bin

ary

Co

un

ters Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 WidePackage Number N14A

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied andFairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORTDEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILDSEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systemswhich, (a) are intended for surgical implant into thebody, or (b) support or sustain life, and (c) whose failureto perform when properly used in accordance withinstructions for use provided in the labeling, can be rea-sonably expected to result in a significant injury to theuser.

2. A critical component in any component of a life supportdevice or system whose failure to perform can be rea-sonably expected to cause the failure of the life supportdevice or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

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This datasheet has been downloaded from:

www.DatasheetCatalog.com

Datasheets for electronic components.

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Published Date : MAR 01, 2008 Drawing No : SDSA2088 V5 Checked : Shin Chi P.1/4

Part Number: DUG14A 14.2mm (0.56") SINGLE DIGIT NUMERIC DISPLAY www.SunLED.com

Part Number

Emitting Color

Emitting Material

Luminous Intensity

(IF=10mA) ucd

Wavelength nm λ P

Description

min. typ.

DUG14A Green GaP 1900 10490 565 Common Anode, Rt. Hand Decimal

Notes: 1. All dimensions are in millimeters (inches). 2. Tolerance is ± 0.25(0.01") unless otherwise noted. 3. Specifications are subject to change without notice.

Features 0.56 INCH DIGIT HEIGHT.

LOW CURRENT OPERATION.

EXCELLENT CHARACTER APPEARANCE.

EASY MOUNTING ON P.C. BOARDS OR SOCKETS.

I.C. COMPATIBLE.

MECHANICALLY RUGGED.

STANDARD : GRAY FACE, WHITE SEGMENT.

RoHS COMPLIANT.

Absolute Maximum Ratings (TA=25°C)

UG (GaP) Unit

Reverse Voltage VR 5 V

Forward Current IF 25 mA

Forward Current (Peak) 1/10 Duty Cycle 0.1ms Pulse Width

iFS 140 mA

Power Dissipation PT 62.5 mW

Operating Temperature TA -40 ~ +85

Storage Temperature Tstg -40 ~ +85

Lead Solder Temperature [2mm Below Package Base] 260°C For 3~5 Seconds

°C

UG (GaP) Unit

Forward Voltage (Typ.) (IF=10mA) VF 2.0 V

Forward Voltage (Max.) (IF=10mA) VF 2.5 V

Reverse Current (Max.) (VR=5V) IR 10 uA

Wavelength Of Peak Emission (Typ.) (IF=10mA)

λ P 565 nm

Wavelength Of Dominant Emission (Typ.) (IF=10mA)

λ D 568 nm

Spectral Line Full Width At Half-Maximum (Typ.) (IF=10mA)

Δλ 30 nm

Capacitance (Typ.) (VF=0V, f=1MHz) C 15 pF

Operating Characteristics (TA=25°C)

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Published Date : MAR 01, 2008 Drawing No : SDSA2088 V5 Checked : Shin Chi P.2/4

Part Number: DUG14A 14.2mm (0.56") SINGLE DIGIT NUMERIC DISPLAY www.SunLED.com

UG

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Published Date : MAR 01, 2008 Drawing No : SDSA2088 V5 Checked : Shin Chi P.3/4

Part Number: DUG14A 14.2mm (0.56") SINGLE DIGIT NUMERIC DISPLAY www.SunLED.com

Remarks:

If special sorting is required (e.g. binning based on forward voltage, luminous intensity / luminous flux, or wavelength),

the typical accuracy of the sorting process is as follows:

1. Wavelength: +/-1nm

2. Luminous Intensity / Luminous Flux: +/-15%

3. Forward Voltage: +/-0.1V

Note: Accuracy may depend on the sorting parameters.

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Published Date : MAR 01, 2008 Drawing No : SDSA2088 V5 Checked : Shin Chi P.4/4

Part Number: DUG14A 14.2mm (0.56") SINGLE DIGIT NUMERIC DISPLAY www.SunLED.com

PACKING & LABEL SPECIFICATIONS DUG14A

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Published Date : FEB 29 , 2008 Drawing No : SDSA2221 V4 Checked : Shin Chi P.1/4

Part Number: DUG14A2 14.22mm (0.56”) DUAL DIGIT NUMERIC DISPLAY www.SunLED.com

Part Number

Emitting Color

Emitting Material

Luminous Intensity

(IF=10mA) ucd

Wavelength nm λ P

Description

min. typ.

DUG14A2 Green GaP 1900 10490 565 Common Anode, Rt. Hand Decimal.

Features 0.56 INCH DIGIT HEIGHT.

LOW CURRENT OPERATION.

EXCELLENT CHARACTER APPEARANCE.

EASY MOUNTING ON P.C. BOARDS OR SOCKETS.

TWO DIGIT PACKAGE SIMPLIFIESALIGNMENTS

& ASSEMBLY.

I.C. COMPATIBLE.

MECHANICALLY RUGGED.

STANDARD : GRAY FACE, WHITE SEGMENT.

RoHS COMPLIANT.

Notes: 1. All dimensions are in millimeters (inches). 2. Tolerance is ± 0.25(0.01") unless otherwise noted. 3. Specifications are subject to change without notice. Absolute Maximum Ratings (TA=25°C)

UG (GaP) Unit

Reverse Voltage VR 5 V

Forward Current IF 25 mA

Forward Current (Peak) 1/10 Duty Cycle 0.1ms Pulse Width

iFS 140 mA

Power Dissipation PT 62.5 mW

Operating Temperature TA -40 ~ +85 °C

Storage Temperature Tstg -40 ~ +85

Lead Solder Temperature [2mm Below Package Base] 260°C For 3~5 Seconds

Operating Characteristics (TA=25°C)

UG (GaP) Unit

Forward Voltage (Typ.) (IF=10mA) VF 2.0 V

Forward Voltage (Max.) (IF=10mA) VF 2.5 V

Reverse Current (Max.) (VR=5V) IR 10 uA

Wavelength Of Peak Emission (Typ.) (IF=10mA)

λ P 565 nm

Wavelength Of Dominant Emission (Typ.) (IF=10mA)

λ D 568 nm

Spectral Line Full Width At Half-Maximum (Typ.) (IF=10mA)

Δλ 30 nm

Capacitance (Typ.) (VF=0V, f=1MHz) C 15 pF

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Published Date : FEB 29 , 2008 Drawing No : SDSA2221 V4 Checked : Shin Chi P.2/4

Part Number: DUG14A2 14.22mm (0.56”) DUAL DIGIT NUMERIC DISPLAY www.SunLED.com

UG

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Published Date : FEB 29 , 2008 Drawing No : SDSA2221 V4 Checked : Shin Chi P.3/4

Part Number: DUG14A2 14.22mm (0.56”) DUAL DIGIT NUMERIC DISPLAY www.SunLED.com

Remarks: If special sorting is required (e.g. binning based on forward voltage, luminous intensity/ luminous flux or wavelength), the typical accuracy of the sorting process is as follows: 1. Wavelength: +/-1nm 2. Luminous Intensity/ luminous flux: +/-15% 3. Forward Voltage: +/-0.1V Note: Accuracy may depend on the sorting parameters.

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Published Date : FEB 29 , 2008 Drawing No : SDSA2221 V4 Checked : Shin Chi P.4/4

Part Number: DUG14A2 14.22mm (0.56”) DUAL DIGIT NUMERIC DISPLAY www.SunLED.com

PACKING & LABEL SPECIFICATIONS DUG14A2

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AK280 com redução

Especificações

Caixa de redução

soluções tecnológicas

medidas em mm

Modelo Tensão Sem carga Máxima PotênciaMáximo rendimento

operação nominal rotação rotaçãocorrente corrente torque torquepotência

3~12V

Ø17

2-M3 Ø

25

10

8

2 30A

Ø7

Ø4

3.5

Ø8.

5

19

Ø24

.4

Ø25

5V 150rpm 1.44A135rpm0.33A 1.10kgf.cm 1.8W 2.50kgf.cm

A Relação

Caixa de Redução Comprimento

AK280/5-R193

Fone / Fax: Curitiba +55 (41) 3028-0222 / Joinville +55 (47) 3028-6757

Rev. 01

3~12V 5V 330rpm 1.44A280rpm0.33A 0.63kgf.cm 1.8W 1.48kgf.cmAK280/5-R330

Velocidade

89 rpm

184 rpm

23 0.2 mm 1 para 70

21 0.2 mm 1 para 40

+-

+-