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Intel® Xeon Phi™ Overview Many Integrated Core Architecture
Prof. Dr. Calebe de Paula Bianchini Universidade Presbiteriana Mackenzie
INTEL CONFIDENTIAL
Agenda
• Introdução ao MIC Um pouco da história • Intel® Xeon Phi™ Overview
Intel® Many Integrated Core Architecture - Intel® MIC
• Desenvolvimento de Aplicações Características da programação MIC • Considerações Perspectivas da Intel®
INTEL CONFIDENTIAL
História
• Projeto Larrabee − 2008-2010
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INTEL CONFIDENTIAL
Agenda
• Introdução ao MIC Um pouco da história • Intel® Xeon Phi™
Intel® Many Integrated Core Architecture - Intel® MIC
• Desenvolvimento de Aplicações Características da programação MIC • Considerações Perspectivas da Intel®
INTEL CONFIDENTIAL
Intel® Xeon Phi™
• Focado em HPC − Grande quantidade de processadores IA − SIMD com 512-bits − 1-1.5 GHz
• Knight-Corner (KNF) − 61 cores, 4 threads/core − 8 GB, GDDR5 (350 GB/s) − 220-300W − x16 PCIe
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INTEL CONFIDENTIAL
Intel® Xeon Phi™
Instruction Decode
Scalar Unit
Vector Unit
Scalar Registers
Vector Registers
L1 Icache & Dcache
256K L2 Cache Local Subset
Ring
Instruction Decode
Scalar Unit
Vector Unit
Scalar Registers
Vector Registers
L1 Icache & Dcache
256K L2 Cache Local Subset
Interprocessor Network
O co-processor:
• Escalar pipeline vindo Pentium processor • Pipeline “curto” • Coerência de cache • Multi-threading, 64-bit, pre-fetching. • 4 threads/core • Registradores separados por thread • IEEE floating point • 32KB de cache de instrução por core • 32KB de cache de dados por core • Instruções para vetores • Instruções escalares • Vector processing unit (VPU), com execução para inteiros, precisão simples e dupla
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INTEL CONFIDENTIAL
Intel® Xeon Phi™
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Knights Corner
PCI-Express x16
GDDR5
Intel® Xeon Phi™ coprocessor
Host CPU (Intel® Xeon®)
x86 Host
Host típico: 1-2 CPU’s 1-8 co-processor
QPI
Host CPU (Intel® Xeon®)
INTEL CONFIDENTIAL
Agenda
• Introdução ao MIC Um pouco da história • Intel® Xeon Phi™
Intel® Many Integrated Core Architecture - Intel® MIC
• Desenvolvimento de Aplicações Características da programação MIC • Considerações Perspectivas da Intel®
INTEL CONFIDENTIAL
Aplicações & Programação
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Aplicações HPC
Aplicações Corporativas
Medical imaging and biophysics
Climate modeling & weather prediction
Financial analyses, trading
Energy – Seismic Applications
Digital content creation
Molecular Modeling
Computational Fluid Dynamics
Computer Aided Design & Manufacturing
DNA Sequencing Electronic Design Automation
Government/Defense
Search Parallel Databases Business Intelligence / Data Mining
INTEL CONFIDENTIAL
Aplicações & Programação
10
Medical imaging and biophysics
Computer Aided Design
& Manufacturing
Climate modeling & weather prediction
Financial analyses, trading
Energy &oil exploration
Digital content creation
Communication Compute Process
C/C++ Fortran
Parallel Application Types Hardware Options for Parallel Application Types
Fine Grain
Coarse Grain
Embarassingly Parallel
Highly Parallel Compute Kernels FFTs
LU Factorization Black-Scholes
Sparse/Dense Matrix Mult
Vector Math …
OR
Intel® MIC Architecture
INTEL CONFIDENTIAL
Aplicações & Programação
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• Intel® MIC Software + Linux com endereços IP
• Ranks MPI podem ser utilizados
*
Intel® Xeon® Processor Intel® Xeon Phi™ coprocessor
Virtual Network Connection
Intel® Xeon® Processor Intel® Xeon Phi™ coprocessor
Virtual Network Connection
…
…
INTEL CONFIDENTIAL
Aplicações & Programação
• Cálculo do PI
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# define NSET 1000000 int main ( int argc, const char** argv ) { long int i; float num_inside, Pi; num_inside = 0.0f; #pragma offload target (MIC) #pragma omp parallel for reduction(+:num_inside) for( i = 0; i < NSET; i++ ) { float x, y, distance_from_zero; // Generate x, y random numbers in [0,1) x = float(rand()) / float(RAND_MAX + 1); y = float(rand()) / float(RAND_MAX + 1); distance_from_zero = sqrt(x*x + y*y); if ( distance_from_zero <= 1.0f ) num_inside += 1.0f; } Pi = 4.0f * ( num_inside / NSET ); printf("Value of Pi = %f \n",Pi); }
INTEL CONFIDENTIAL
Aplicações & Programação
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C/C++ Syntax Semantics New offload pragma
#pragma offload ( clauses) Execute next statement on target (which could be an OpenMP* parallel construct)
Place function on target
__declspec ( target ( x ) ) Compile function for CPU and target
Fortran Syntax Semantics New offload directive
!dir$ omp offload <clauses> Execute next OpenMP parallel construct on target
Place function on target
!dir$ attributes offload:<x> :: <rtn-‐name>
Compile function for CPU and target
INTEL CONFIDENTIAL
Aplicações & Programação
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1. Offloading a function call #pragma offload target (mic) foo(); 2. Calculating Pi with automatic offload #pragma offload target (mic) #pragma omp parallel for reduction(+:pi) for (i=0; i<count; i++) { float t = (float)((i+0.5)/count); pi += 4.0/(1.0+t*t); } pi /= count
3. Using MKL with offload void your_hook() { float *A, *B, *C; /* Matrices */ #pragma offload target(mic) in(transa, transb, N, alpha, beta) \ in(A:length(matrix_elements)) \ in(B:length(matrix_elements)) \ in(C:length(matrix_elements)) \ out(C:length(matrix_elements)alloc_if(0)) sgemm(&transa, &transb, &N, &N, &N, &alpha, A, &N, B, &N, &beta, C, &N); }
foo() { .... } // Compiled for mic
INTEL CONFIDENTIAL
Aplicações & Programação
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Below tools are being extended to support not only Intel® Xeon® processor but Intel® Xeon Phi™ coprocessor as well
Compilers Intel® C++ Compiler & Intel® Fortran Compiler
Analysis Tools Intel® VTune™ Amplifier XE Intel® Trace Analyzer and Collector
Libraries Intel® Math Kernel Library Intel® Integrated Performance Primitives Intel® Message Passing Interface Library
Parallel Programming Models
Message Passing Interface (MPI), OpenMP, OpenCL, Cilk™ Plus, Coarray Fortran
INTEL CONFIDENTIAL
Agenda
• Introdução ao MIC Um pouco da história • Intel® Xeon Phi™
Intel® Many Integrated Core Architecture - Intel® MIC
• Desenvolvimento de Aplicações Características da programação MIC • Considerações Perspectivas da Intel®
INTEL CONFIDENTIAL
Futuro
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High Performance Computing / Enterprise
Intel® Parallel Studio XE 2011 Service Pack 1
Q1 ’13 Q1 ’12 Q2 ’12 Q4 ’12 Q3 ’12
Gold release Beta Release window Alpha
Intel® Cluster Studio XE 2012
Intel® Parallel Studio XE NEXT
Intel® Cluster Studio XE NEXT
Intel® Cluster Tools Support for Intel® MIC Architecture (Linux*)
Intel Compilers & Analysis Tools for Intel® MIC Architecture
Intel® Cluster Tools Support for Intel® MIC Architecture (Linux*)
Many-Core Intel Compilers & Analysis Tools for Intel® MIC Architecture (Linux*)
Data Center Tools
Beta release window for Microsoft Windows*
Intel® MIC Support (Windows*) Drivers & SW Development Tools
Beta**
Intel Corporation 18
Developing Today on Knights Ferry
Obrigado! Prof. Dr. Calebe de Paula Bianchini [email protected]