Single-Inductor Dual-Output Soft-Switching Converter with Voltage-mode Resonant Switch

Yasunori Kobori*, Nobukazu Tsukiji, Yoshiki Sunaga, Takuya Arafune, Nobukazu Takai, Haruo Kobayashi

( Gunma University )

（ IEEE ICSICT 2016 ）

1

Outline 1. Introduction 2. Conventional Soft Switching Converter 2-1 Half-wave type Converter 2-2 Full-wave type Converter

3. Proposed Soft Switching Converters 3-1 Voltage-mode Converter with Clamp Circuit 3-2 Simulation Results 4. Single-Inductor Dual-Output (SIDO) Converters 4-1 Soft Switching SIDO Converter with Clamp 4-2 Simulation Results

5. Conclusion

SIDO : Single-Inductor Dual-Output

Fig.1 Our Research for Switching Converters

Functions

［Single Output］

［Dual/Multi

Output］

Low Cost

Buck/Boost Converters

ＳＩＤＯ Serial

（Standard type）

（Reduce Inductor)

Hysteretic Converters

（High Speed）

ＳＩＤＯ （Synchronizing）

Resonant Converter

（Soft Switching）

ＳＩＤＯ （Resonant Level）

2

●Our Research

1. Introduction

3

Outline 1. Introduction 2. Conventional Soft Switching Converters 2-1 Half-wave type Converter 2-2 Full-wave type Converter

3. Proposed Soft Switching Converters 3-1 Voltage-mode Converter with Clamp Circuit 3-2 Simulation Results 4. Single-Inductor Dual-Output (SIDO) Converters 4-1 Soft Switching SIDO Converter with Clamp 4-2 Simulation Results

5. Conclusion

SIDO : Single-Inductor Dual-Output

4

Fig.3 Major Signals

PWM

SAW

IL Io

⊿Vo

2. Conventional Soft Switching Converter

● Normal Buck Converter * Clock pulse generates Saw-tooth(SAW) signal. * SW is controlled by PWM signal, * PWM is generated by comparing ⊿Vo and SAW signal.

Fig.2 Standard Buck Converter

SＷ Lo Vi Vo

PWM

SAW

AMP

Co RL Do

Clock

COMP1

⊿Vo

PWM: Pulse Width Modulation

Fig.4 Half-wave Converter 5 Fig.5 Major Signals

2-1 Voltage-mode Soft Switching Converter 【Half-wave type converter】 ・Resonant Inductor Lr & Resonant Capacitor Cr are added. ・When SW is OFF, resonant voltage Vr goes up & down. ・ No clock, so SAW is triggered & PWM turns [H], when Vr = VD. ⇒ Zero-Voltage Switching (ZVS) ⇒ Reduce Switching Loss

PWM

SAW

Ir

IL

Vr GND

Io

Vi

Trigger

Vo

PWM

SAW

AMP

Co RL

Vr COMP2

COMP1

SＷ

Lo

Vi

Cr

Lr

Do

Vr Ir IL VD

VD

⊿Vo

6 Fig.8 Simulation Results Fig.5 Major Signals

PWM

SAW

Ir

IL

Vr GND

Io

Vi

● Simulation Results (SIMPLIS 7.0) * Simulation Conditions： ・Vi=10V, Vo=5V, Io=0.25A Lr=20uH, Cr=100pF * Simulation Results: FOP = 380kHz, Vr = 125V Ir = -0.25A, ID = 0.50A

[ms]

125V

V

-0

20

40

60

80

100

120

time/mSecs 500nSecs/div

7.9995 8 8.0005 8.001 8.0015 8.002 8.0025 8.003

?

Y3

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

mA

Y2

-200

-100

0

100

200

300

400

500

To=2.62 us

VD

Vr

I D I L

I r -270mA

540mA

Fig.6 Full-wave Converter 7 Fig.7 Major Signals

Vo

PWM

SAW

AMP

Co RL

Vr COMP2

COMP1

Lo

Vi

Cr

Lr

Do

Vr Ir IL VD

VD

【Full-wave type converter】

・Only Diode is added to Half-wave type converter.

・The resonant voltage Vr goes positive & negative. ⇒ Diode blocks conduction of Body-Diode BD, when Vr < 0.

PWM

SAW

Ir

IL

Vr GND

Io

Vi

BD

⊿Vo

Trigger

8 Fig.9 Simulation Results Fig.7 Major Signals

●Simulation Results ・Simulation Conditions are same. ・Resonant Results: Fop=830 kHz, Vr=Vi±115V, Ir = －0.25A, Id = 0.50A

PWM

SAW

Ir

IL

Vr GND

Io

Vi [ms]

-260mA

V

-150

-100

-50

0

50

100

150

time/mSecs 200nSecs/div

3.8994 3.8996 3.8998 3.9 3.9002 3.9004 3.9006 3.9008 3.901

mA

-300

-200

-100

-0

100

200

300

400

500

125V

To=1.2 us

Vr

Vd

Ir

Id Io 500mA

-105V

9

Outline 1. Introduction 2. Conventional Soft Switching Converters 2-1 Half-wave type Converter 2-2 Full-wave type Converter 3. Proposed Soft Switching Converters 3-1 Voltage-mode Converter with Clamp Circuit 3-2 Simulation Results 4. Single-Inductor Dual-Output (SIDO) Converters 4-1 Soft Switching SIDO Converter with Clamp 4-2 Simulation Results

5. Conclusion

SIDO : Single-Inductor Dual-Output

Fig.10 Proposed Half-wave Converter 10

3-1 Voltage-mode Converter with Clamp Circuit

【Half-wave type converter】

・Add clamp circuit with Zener Diode. (Vz is 40V.) ・Peak voltage of Vr is suppressed from at 125V to 44V. (35%) ・ Resonant current Ir is suppressed from 250mA to 70mA. (30%) ・ Operating period Top is changed from 2.62us to 2.02us. (77%)

Vo SＷ Vi

Cr

Lr Vr

IL VD

ZD

Fig.11 Simulation Results

Vr / V

-60

-40

-20

0

20

40

60

time/mSecs 500nSecs/div

7.799 7.7995 7.8 7.8005 7.801 7.8015 7.802

mA

-200

-100

0

100

200

300

400

500

Vr

Id

Ir

2.04us

3. Proposed Soft-Switching Converter

Fig.12 Full-wave Converter 11

【Full-wave type converter】

・Clamp circuit like Half-wave type.

・Peak voltage of Vr is suppressed from at 125V to 44V. (35%) ⇒ Low break-voltage BVDS MOSFETs can be used. ・ Resonant current Ir is suppressed from 250mA to 90mA. (35%) ・ Operating period Top is changed from 1.2us to 3.7us. (X3.1)

Vo SＷ Vi

Cr

Lr Vr

IL VD

ZD

Fig.13 Simulation Results

Vr

Vc / V

-60

-40

-20

0

20

40

60

time/mSecs 1uSecs/div

4.898 4.899 4.9 4.901 4.902 4.903

mA

-200

-100

0

100

200

300

400

500

44V

Id

Ir

3.7us -20V

0.33A

-0.09A

Fig.14 Ripple of Half-wave Converter 12

3-2 Simulation Results

【Output Voltage Ripples】

* Vo=5.0V (Half-wave), Vo=7.0V (Full-wave) ・Stable output ripples are less than 2 mVpp @ Io=0.50A. ・Over/Under-shoots are less than ±15mV @⊿Io=0.25A.

time/mSecs 200uSecs/div

3.6 3.8 4 4.2 4.4 4.6 4.8 5 5.2 5.4

V

4.97

4.98

4.99

5

5.01

5.02

5.03

With Clamp

W/O Clamp 13mV

12mV

0.25A 0.25A 0.50A

Fig.15 Ripple of Full-wave Converter

12mV

time/mSecs 200uSecs/div

3.6 3.8 4 4.2 4.4 4.6 4.8 5 5.2 5.4

V

6.97

6.98

6.99

7

7.01

7.02

7.03

W/O Clamp

12mV

With Clamp

0.25A 0.25A 0.50A

13

Outline 1. Introduction 2. Conventional Soft Switching Converters 2-1 Half-wave type Converter 2-2 Full-wave type Converter

3. Proposed Soft Switching Converters 3-1 Voltage-mode Converter with Clamp Circuit 3-2 Simulation Results 4. Single-Inductor Dual-Output (SIDO) Converters 4-1 Soft Switching SIDO Converter with Clamp 4-2 Simulation Results

5. Conclusion

SIDO : Single-Inductor Dual-Output

OP amp1 Power

Stage

OP amp2

VD

Vr

Fig.16 SIDO Converter with Clamp 14

4-1 Soft Switching SIDO Converter with Clamp ・It consists of Power stage, Two sub-converters and controller. ・SEL signal is decided by comparing ⊿V1 and ⊿V2. ・Each period is different. SEL & SAW are synchronized with PWM.

★Reduce Lo, Lr, Cr, ZD.

Fig.17 Simulation Results (Full-wave)

4. Single-Inductor Dual-output Converter

SEL

PWM

Vr IL S

EL / V

0

1

2

3

4

PW

M / V

0

1

2

3

4

5

time/mSecs 5uSecs/div

4.5 4.505 4.51 4.515 4.52

IL / A

0.4

0.6

0.8

1

1.2

1.4

V

Y1

-20

0

20

40

60

15

4-2 Simulation Results A) Output Voltage Ripples (Vo1=5.0V, Vo2=4.0V, Vz=40V) ・Current step: Io1= 0.50A ⇔ 0.75A, Io2= 0.25A ⇔ 0.50A ・Stable Ripples : < 5mVpp (<0.2%) @ Io=0.75A ・Overt/Under-shoots: ≒±12mV (≒0.25%) @⊿Io=0.25A (Blue Arrows show Self-Regulation, Red Arrows do Cross-Regulation. )

Fig.19 Ripple of Half-wave Converter

±9 mV

[ms]

Vo1 / V

4.97

4.98

4.99

5

5.01

5.02

5.03

time/mSecs 1mSecs/div

5 6 7 8 9

VO

2 / V

3.97

3.98

3.99

4

4.01

4.02

4.03

±9 mV

1 ms

V2=4V

V1=5V

I1=0.50A 0.50A 0.75A

I2=0.25A 0.25A 0.50A

Cross-Regulation

±9 mV

Fig.18 Ripple of Full-wave Converter

Vo1 / V

4.97

4.98

4.99

5

5.01

5.02

5.03

time/mSecs 1mSecs/div

4 5 6 7 8 9

VO

2 / V

3.97

3.98

3.99

4

4.01

4.02

4.03V2=4V

V1=5V 1 ms ±12 mV

±10 mV

I1=0.50A 0.50A 0.75A

I2=0.25A 0.25A 0.50A

Self-Regulation

V2=4V

V1=5V 1 ms ±12 mV

±10 mV

I1=0.50A 0.50A 0.75A

I2=0.25A 0.25A 0.50A

16

5. Conclusion 1. Proposed Soft Switching Converters with Zener Clamp

* Conditions: Vo=5.0V, Io=0.25A, Vz=40V

1) Suppress resonant voltage from 125V to 44V (35%).

⇒ MOSFETs with Low BVDS can be used.

2) Suppress resonant current from 260mA to 90mA (35%).

3) Stable output ripples : < 2mVpp @ Io = 0.50A.

4) Over/Under-shoots : ±15mV @⊿Io = 0.25A.

2. SIDO Soft Switching Converters with Clamp

* Conditions: Vo1=5.0V, Vo2=4.0V, Io1=0.5A, Io2=0.25A

1) Stable output ripples : < 5mVpp @ Io = 0.75A.

2) Over/Under-shoots : ±12mV @⊿Io = 0.25A.

17

Thank you for your attention!

謝 謝

18

3-2 Simulation Results

【Operation Period Top vs. Output Current Io 】

・ In Full-wave converter, Top changes from 1.7us to 13.2us. (X7.5) ・ In Half-wave converter, Top is reduced from 10us to 6.2us. (62%) ・ Clamp method is good for Half-wave converter. [TF: Full-wave, TH: Half-wave] [Tw: with Clamp, To: without Clamp]

Fig.16 Operating Period Top vs. Output current Io

[us]

[A]

THo

THw

TFo

TFw

Half-wave

Fig.21 Power Loss of SISO (SISO: Single-Inductor Single-Output) 19

Fig.22 Power Loss of SIDO

0.0

0.5

1.0

1.5

2.0

2.5

3.0

0 0.25 0.5 0.75 1

Psw(SISO*2) Psw(SIDO) ⊿Po

SIDO

SISO*2

Difference

0.0

0.5

1.0

1.5

2.0

2.5

0 0.5 1 1.5 2 2.5

Psw(従来) Psw(ｿﾌﾄSW) ⊿Po [Ｗ]

[Ａ]

B) Power Loss vs. Output Current Io ・Power loss of W/O clamp is better than that of with clamp. ・It is difficult to improve the efficiency in Soft Switching. But ・・・

Psw(Soft SW) Psw(Conv.)

Conventional

Soft Switching

Difference

Fig.23 Spectrum of Voltage of SW 20

C) Spread Spectrum of Vsw ・Spectrum of Voltage between Switching element. ・More than 50MHz, spectrum level of soft switching converter is better than that of the conventional one. ・Soft switching converter may be good for EMI reduction.

Frequency/MHertz 20MHertz/div

-0 20 40 60 80 100 120 140 160 180 200

V

10u

100u

1m

10m

100m

1

10

Soft Switching Converter Conventional Converter

50MHz

SＷ Vi Vo

V

21

【 Operating 0】 * State 0： ・First, PWM=[H] & SW=ON ・VD = Vi, Do = OFF ⇒ Ir = IL (Increasing)

【Conditions】 * Resonant Condition：Vi＜Vr = Io・Zr (Zr=√(Lr/Cr) Characteristics Z

* Resonant Frequency：Fr= 1/2π√(Lr・Cr) ( ≠ Operating Frequency)

Vi Vo

PWM=H

VD

IL Ir

Vr

Lo Lr

PWM

SAW

Ir

IL

Vr GND

Io

Vi

Fig.4-1 Half-wave Converter Fig.5-1 Major Signals

SW=ON

22

IL

PWM

SAW

Ir

IL

Vr GND

Io

Vi

Vi Vo

PWM=L

Vr Ir

VD

Cr

Lr

ID

【 Operating 1】 * State 1： ・Vo is increasing & Vo > Vref, then PWM turns [L] & SW=OFF ・L & C start resonating. ⇒ Ir is charging C and Vr goes up. Diode turns ON and VD is -VF. ・After Ir=0, Ir direction turns reverse and Vr lowers to 0V. ・Finally, Vr reaches to VD =-VF.

Fig.4-2 Half-wave Converter Fig.5-2 Major Signals

23

Vi Vo

PWM=H

Vr Ir

VD

PWM

SAW

Ir

IL

Vr GND

Io

Vi

ID

Fig.4-3 Half-wave Converter Fig.5-3 Major Signals

【 Operating 2】 * State 2： ・When detect VD =-VF, SAW is reset & PWM turns [H] & SW=ON ・L & C resonance stops. ⇒ ・After Ir=0, Ir direction turns reverse and Vr lowers to 0V. ・Finally, Vr reaches to VD =-VF.

Io=0.25 A

[V]

[ms]

Io=0.25 A

Io=0.50 A

±15mV

24

* Step Response: Io = 0.25A ⇔ 0.50A

・Stable output ripples ＜2mVpp @ Io= 0.5A

・Step Responses (Over/Under shoots)＜±15mV

Fig.10 Step Responses

2-2 Simulation Results 【 Output Voltage Ripples 】