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Linhas de Pesquisa em Eletronica para Upgrade/LHCb
1 Andre Massafferri em nome de 1,2,3 LHCbRio
1Centro Brasileiro de Pesquisas Fısicas2Universidade Federal do Rio de Janeiro
3Pontifıcia Universidade Catolica
Avaliacao de Projetos Upgrade - RENAFAE30 novembro 2012
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Topicos
Topicos
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Topicos
Topicos
Quatro linhas de atuacao
LHCb
7→ Upgrade
7→ Eletronica
7→ TELL40
1 Sistema de controle: RioECSboard
2 TestBench novas Front-Ends: 1a versao para OT
3 Producao da motherboard TELL40 no Brasil
7→ Fibras Opticas
Custos & Agenda
Conclusoes
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LHCb
LHCb
Andre Massafferri (CBPF) Upgrade RENAFAE 2012 4 / 25
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LHCb
LHCb
LDESIGN = 4 * 1032 cm2 s−1 :∫Ldt > 2.2 fb−1 em 2012
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LHCb-Upgrade
LHCb-Upgrade
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LHCb-Upgrade
Upgrade
10*LDESIGN
{DetectoresEletronica
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LHCb-Upgrade
Upgrade: Detectores
altos nıveis de radiacao & ocupacao (< 20% Algo Tracking)
Andre Massafferri (CBPF) Upgrade RENAFAE 2012 8 / 25
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LHCb-Upgrade
Upgrade: Eletronica
• Atualbanda saturada 4x1Gbstransceivers + links + proc FPGA
↓Eff L0Hadron 50%!
• Upgradeextincao L0
↓readout 40 MHz10*L + full Hadron
• Linhas Atuacao LHCb (Brasil)
TELL40
sistema controle: ECS
producao motherboard
Test-Bench (Front-End)
Data-linksFront-End
SUBDETECTORES
Front-Ends
HLT
Trigger
L0
40 MHz BX
Eletrônica L0
1 MHz
Eletrônica TELL1
4 X 1 Gbs
armazenagem5 KHz
SUBDETECTORES
Front-Ends
HLT
40 MHz BX
4 X 10 Gbs
armazenagem
~50 KHz
DATA
Eletrônica TELL40
SUBDETECTORES
Front-Ends
HLT
40 MHz BX
4 X 10 Gbs
armazenagem
~50 KHz
ECSDATA
ECS
Eletrônica TELL40 Sala
Controle
+ links
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LHCb-Upgrade
Upgrade: Eletronica
• Atualbanda saturada 4x1Gbstransceivers + links + proc FPGA
↓Eff L0Hadron 50%!
• Upgradeextincao L0
↓readout 40 MHz10*L + full Hadron
• Linhas Atuacao LHCb (Brasil)
TELL40
sistema controle: ECS
producao motherboard
Test-Bench (Front-End)
Data-linksFront-End
SUBDETECTORES
Front-Ends
HLT
Trigger
L0
40 MHz BX
Eletrônica L0
1 MHz
Eletrônica TELL1
4 X 1 Gbs
armazenagem5 KHz
SUBDETECTORES
Front-Ends
HLT
40 MHz BX
4 X 10 Gbs
armazenagem
~50 KHz
DATA
Eletrônica TELL40
SUBDETECTORES
Front-Ends
HLT
40 MHz BX
4 X 10 Gbs
armazenagem
~50 KHz
ECSDATA
ECS
Eletrônica TELL40 Sala
Controle
+ links
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LHCb-Upgrade
Upgrade: Eletronica
• Atualbanda saturada 4x1Gbstransceivers + links + proc FPGA
↓Eff L0Hadron 50%!
• Upgradeextincao L0
↓readout 40 MHz10*L + full Hadron
• Linhas Atuacao LHCb (Brasil)
TELL40
sistema controle: ECS
producao motherboard
Test-Bench (Front-End)
Data-linksFront-End
SUBDETECTORES
Front-Ends
HLT
Trigger
L0
40 MHz BX
Eletrônica L0
1 MHz
Eletrônica TELL1
4 X 1 Gbs
armazenagem5 KHz
SUBDETECTORES
Front-Ends
HLT
40 MHz BX
4 X 10 Gbs
armazenagem
~50 KHz
DATA
Eletrônica TELL40
SUBDETECTORES
Front-Ends
HLT
40 MHz BX
4 X 10 Gbs
armazenagem
~50 KHz
ECSDATA
ECS
Eletrônica TELL40 Sala
Controle
+ links
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LHCb-Upgrade
Upgrade: Eletronica
Arquitetura: com mais detalhes ... (GBT, LLT)
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LHCb-Upgrade
Upgrade: Agenda
2012 L = 4 * 1032 cm2 s−1,∫Ldt = 2.2 fb−1
2013-14 Shutdown FASE 1
Manutencao experimento LHCbModificacao infra-estrutura necessaria UpgradeLHC: Efeixe = 8 TeV → 13-14 TeV
2015-16-17 Data TakingValidacao prototipos: 40 MHz
2018-19 Shutdown FASE 2Instalacao Upgrade experimento LHCbUpgrade FASE 1 para ATLAS/CMS
> 2019 Data Taking Upgrade !
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LHCb-Upgrade
Upgrade: Agenda
2012 L = 4 * 1032 cm2 s−1,∫Ldt = 2.2 fb−1
2013-14 Shutdown FASE 1
Manutencao experimento LHCbModificacao infra-estrutura necessaria UpgradeLHC: Efeixe = 8 TeV → 13-14 TeV
2015-16-17 Data TakingValidacao prototipos: 40 MHz
2018-19 Shutdown FASE 2Instalacao Upgrade experimento LHCbUpgrade FASE 1 para ATLAS/CMS
> 2019 Data Taking Upgrade !
Andre Massafferri (CBPF) Upgrade RENAFAE 2012 11 / 25
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LHCb-Upgrade
Upgrade: Agenda
2012 L = 4 * 1032 cm2 s−1,∫Ldt = 2.2 fb−1
2013-14 Shutdown FASE 1
Manutencao experimento LHCbModificacao infra-estrutura necessaria UpgradeLHC: Efeixe = 8 TeV → 13-14 TeV
2015-16-17 Data TakingValidacao prototipos: 40 MHz
2018-19 Shutdown FASE 2Instalacao Upgrade experimento LHCbUpgrade FASE 1 para ATLAS/CMS
> 2019 Data Taking Upgrade !
Andre Massafferri (CBPF) Upgrade RENAFAE 2012 11 / 25
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LHCb-Upgrade
Upgrade: Agenda
2012 L = 4 * 1032 cm2 s−1,∫Ldt = 2.2 fb−1
2013-14 Shutdown FASE 1
Manutencao experimento LHCbModificacao infra-estrutura necessaria UpgradeLHC: Efeixe = 8 TeV → 13-14 TeV
2015-16-17 Data TakingValidacao prototipos: 40 MHz
2018-19 Shutdown FASE 2Instalacao Upgrade experimento LHCbUpgrade FASE 1 para ATLAS/CMS
> 2019 Data Taking Upgrade !
Andre Massafferri (CBPF) Upgrade RENAFAE 2012 11 / 25
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LHCb-Upgrade
Upgrade: Agenda
2012 L = 4 * 1032 cm2 s−1,∫Ldt = 2.2 fb−1
2013-14 Shutdown FASE 1
Manutencao experimento LHCbModificacao infra-estrutura necessaria UpgradeLHC: Efeixe = 8 TeV → 13-14 TeV
2015-16-17 Data TakingValidacao prototipos: 40 MHz
2018-19 Shutdown FASE 2Instalacao Upgrade experimento LHCbUpgrade FASE 1 para ATLAS/CMS
> 2019 Data Taking Upgrade !
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LHCb-Upgrade
LHCb-Upgrade-Eletronica-TELL40
conceito: gerenciamento (rad-prot) DATA, ECS(FE), TFC, ...versatil → todos subsistemas: total 200-300 modulostarefa: formatacao, emulacao chip GBT FPGA, decode/compressaoHW: CPPM-Marseille (motherboard + 4 AMCs) FW: diferentes grupos
André Massafferri 1
motherboard
ECS
FPGA
FPGA
FPGA
FPGA
10 Gbs/x Eth
12x10 Gbs/x GBTDATA
HLT
CR
Eth 1Gbs
FPGA stratix V Altera
FE
12x
12x
FARM
André Massafferri 1
motherboard
ECS
FPGA
FPGA
FPGA
FPGA
12x
10 Gbs/x GBT ECS
CR
Eth 1Gbs
FPGA stratix V Altera
FE
12x12x
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LHCb-Upgrade
LHCb-Upgrade-Eletronica-TELL40
conceito: gerenciamento (rad-prot) DATA, ECS(FE), TFC, ...versatil → todos subsistemas: total 200-300 modulostarefa: formatacao, emulacao chip GBT FPGA, decode/compressaoHW: CPPM-Marseille (motherboard + 4 AMCs) FW: diferentes grupos
André Massafferri 1
motherboard
ECS
FPGA
FPGA
FPGA
FPGA
10 Gbs/x Eth
12x10 Gbs/x GBTDATA
HLT
CR
Eth 1Gbs
FPGA stratix V Altera
FE
12x
12x
FARM
André Massafferri 1
motherboard
ECS
FPGA
FPGA
FPGA
FPGA
12x
10 Gbs/x GBT ECS
CR
Eth 1Gbs
FPGA stratix V Altera
FE
12x12x
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LHCb-Upgrade
Projetos em andamento
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LHCb-Upgrade
Sistema de controle: RioECSboard
definicao
Unidade controle generica para Config, Mon e Debug: acesso PVSS da sala de controle (CR)
para dispositivos em area rad-prot (counting room)
CR ↔ Ethernet ↔ embedded PC ↔ PCIe︸ ︷︷ ︸high speed (HS)
, I2C, JTag, SPI︸ ︷︷ ︸low speed (LS)
↔ dispositivo
Grupo & Perıodo
Responsabilidade CBPF desde 2009
Massafferri, F. Sousa (tecnico), L. Lessa (mestrado, CERN) budged CERN (4 meses Rio)
apresentacoes sistematicas meetings Eletronica (bimestral)
usuarios
controle da TELL40s ⇒ implementacao Onboard (limitacao vertical crate ATCA)
↓indireto das Front-Ends
modulos TFC, alta tensao, outros ⇒ implementacao Mezzanino
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LHCb-Upgrade
Sistema de controle: RioECSboard
Genoa group → CBPF
CCPC 133 MHz → 1 GHz
Eth 10/100 Mbs → 1 Gbs
PCI → PCIe (2.56 Gbs)
4 I2C & 3 JTag → flexıvel
RJ45Eth 1Gbs
CON1xUSB
CONLVDS
CON
CCPC
Switch PCIe
CLK PCIe
CON
DEVICE
LVDSVGA
adapter
POWER (5V0,3V3,1V5,1V2,1V0)
12V
IP HW
FPGA Cyclone IV
IP SW
config
external
monitor
1xPCIe
1xPCIe
GPIO(JTag)
1xPCIe
nanoETX-TT Kontron mezzanine
1xCLK PCIe 6xCLK PCIe
6xPCIe
N x GPIO
4xSPI4xJTag8xI2C
flexibility
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LHCb-Upgrade
Sistema de controle: RioECSboard
Status R&DSetups: CBPF & CERN
Hw: prototipo e sistema de validacao dez 2012
Sw: drivers e algoritmo teste OK
Fw: controladores FPGA OK
documentacao: nota tecnica CERN & tese de
mestrado < fev 2013
Custo & Calendario
Onboard (demarcacao TELL40)
200 un * US$ 530,00
2014Mezzanino (outros)
100 un * US$ 590,00
2014
Setup de desenvolvimento
USB
LAN
ArriaIIkit
SMA200kit
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LHCb-Upgrade
Sistema de controle: RioECSboard
Status R&DSetups: CBPF & CERN
Hw: prototipo e sistema de validacao dez 2012
Sw: drivers e algoritmo teste OK
Fw: controladores FPGA OK
documentacao: nota tecnica CERN & tese de
mestrado < fev 2013
Custo & Calendario
Onboard (demarcacao TELL40)
200 un * US$ 530,00
2014Mezzanino (outros)
100 un * US$ 590,00
2014
Setup de desenvolvimento
USB
LAN
ArriaIIkit
SMA200kit
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LHCb-Upgrade
TestBench novas Front-Ends
definicao
Troca de Front-End em varios sub-sistemas requer novo sistema de verificacao
Grupo & Perıodo
Cooperacao Nikhef-CBPF [Massafferri, F. Sousa, M. Feo (mestrado)] 2012
Ciencia-Sem-Fronteira Pesq-Visitante [team leader Antonio Pellegrino] - 2012-2013-2014
foco Outer-Tracker500 FE-boxes
→ 128x [Amp+disc] OK
→ 4 TDCs + 1 Transmissao troca
Universalidade TELL40
→ Hw e Fw comum→ Sw dedicado (root)
Detector
1
motherboard
ECS
FPGA
(n<12)x
DATA (n<12)x
ECS/TFC (n<12)xFront-End
Eth 1Gbs
FE
injector
q
PC
Test procedure
Analysisdiagnostic
DATA
adapted TELL40
Custo & Calendario
setup (TELL40 adaptado) 12528,00 euro
→ 3 unidades protos TELL40 ja foram distribuidas (RENAFAE)
2013-2014
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LHCb-Upgrade
TestBench novas Front-Ends
definicao
Troca de Front-End em varios sub-sistemas requer novo sistema de verificacao
Grupo & Perıodo
Cooperacao Nikhef-CBPF [Massafferri, F. Sousa, M. Feo (mestrado)] 2012
Ciencia-Sem-Fronteira Pesq-Visitante [team leader Antonio Pellegrino] - 2012-2013-2014
foco Outer-Tracker
500 FE-boxes
→ 128x [Amp+disc] OK
→ 4 TDCs + 1 Transmissao troca
Universalidade TELL40→ Hw e Fw comum→ Sw dedicado (root)
Detector
1
motherboard
ECS
FPGA
(n<12)x
DATA (n<12)x
ECS/TFC (n<12)xFront-End
Eth 1Gbs
FE
injector
q
PC
Test procedure
Analysisdiagnostic
DATA
adapted TELL40
Custo & Calendario
setup (TELL40 adaptado) 12528,00 euro
→ 3 unidades protos TELL40 ja foram distribuidas (RENAFAE)
2013-2014
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LHCb-Upgrade
TestBench novas Front-Ends
definicao
Troca de Front-End em varios sub-sistemas requer novo sistema de verificacao
Grupo & Perıodo
Cooperacao Nikhef-CBPF [Massafferri, F. Sousa, M. Feo (mestrado)] 2012
Ciencia-Sem-Fronteira Pesq-Visitante [team leader Antonio Pellegrino] - 2012-2013-2014
foco Outer-Tracker
500 FE-boxes
→ 128x [Amp+disc] OK
→ 4 TDCs + 1 Transmissao troca
Universalidade TELL40
→ Hw e Fw comum→ Sw dedicado (root)
Detector
1
motherboard
ECS
FPGA
(n<12)x
DATA (n<12)x
ECS/TFC (n<12)xFront-End
Eth 1Gbs
FE
injector
q
PC
Test procedure
Analysisdiagnostic
DATA
adapted TELL40
Custo & Calendario
setup (TELL40 adaptado) 12528,00 euro
→ 3 unidades protos TELL40 ja foram distribuidas (RENAFAE)
2013-2014
Andre Massafferri (CBPF) Upgrade RENAFAE 2012 17 / 25
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LHCb-Upgrade
Projetos futuros CBPF & UFRJ
Contribuicao brasileira ao Upgrade/LHCb ⇒ ∼ 800K CHF
estrategia
{industria nacional
envolvimento tecnicos, estudantes ...
Andre Massafferri (CBPF) Upgrade RENAFAE 2012 18 / 25
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LHCb-Upgrade
Projetos futuros CBPF & UFRJ
Contribuicao brasileira ao Upgrade/LHCb ⇒ ∼ 800K CHF
estrategia
{industria nacional
envolvimento tecnicos, estudantes ...
Andre Massafferri (CBPF) Upgrade RENAFAE 2012 18 / 25
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LHCb-Upgrade
Producao da motherboard TELL40 no Brasil
TELL40
{motherboard: alimentacao e controle (ECS!)
4 placas AMCs (mezzaninos): Stratix V
Upgrade requer a producao de 200−300 TELL40
tarefa: componentes︸ ︷︷ ︸12
nacionais
↔ PCB︸ ︷︷ ︸terceirizado
↔ montagem︸ ︷︷ ︸terceirizado
↔ teste︸︷︷︸tecnicos, estudantes
teste CPPM 8Gbs → GBT frame
desafios: arquivo gerber prototipo CPPM-MarseillePCB (16 camadas, Teflon → VT4): Micropress e Multek sinalizam que
estarao aptas no futuro proximo (dificuldades roteamento, nao numero de camadas)
Montagem: CadService e Eurotronics (em avaliacao ECS)
Local: Lab Elet MultiUsuario LAFEX em franca evolucao[gargalo] scope 4 GHz Tek (2.56 Gbs) → 20 GHz (10 Gbs)
Custo & Calendario:200 un * 1000 euro 2013-2014-2015
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LHCb-Upgrade
Producao da motherboard TELL40 no Brasil
TELL40
{motherboard: alimentacao e controle (ECS!)
4 placas AMCs (mezzaninos): Stratix V
Upgrade requer a producao de 200−300 TELL40
tarefa: componentes︸ ︷︷ ︸12
nacionais
↔ PCB︸ ︷︷ ︸terceirizado
↔ montagem︸ ︷︷ ︸terceirizado
↔ teste︸︷︷︸tecnicos, estudantes
teste CPPM 8Gbs → GBT frame
desafios: arquivo gerber prototipo CPPM-MarseillePCB (16 camadas, Teflon → VT4): Micropress e Multek sinalizam que
estarao aptas no futuro proximo (dificuldades roteamento, nao numero de camadas)
Montagem: CadService e Eurotronics (em avaliacao ECS)
Local: Lab Elet MultiUsuario LAFEX em franca evolucao[gargalo] scope 4 GHz Tek (2.56 Gbs) → 20 GHz (10 Gbs)
Custo & Calendario:200 un * 1000 euro 2013-2014-2015
Andre Massafferri (CBPF) Upgrade RENAFAE 2012 19 / 25
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LHCb-Upgrade
Producao da motherboard TELL40 no Brasil
TELL40
{motherboard: alimentacao e controle (ECS!)
4 placas AMCs (mezzaninos): Stratix V
Upgrade requer a producao de 200−300 TELL40
tarefa: componentes︸ ︷︷ ︸12
nacionais
↔ PCB︸ ︷︷ ︸terceirizado
↔ montagem︸ ︷︷ ︸terceirizado
↔ teste︸︷︷︸tecnicos, estudantes
teste CPPM 8Gbs → GBT frame
desafios: arquivo gerber prototipo CPPM-MarseillePCB (16 camadas, Teflon → VT4): Micropress e Multek sinalizam que
estarao aptas no futuro proximo (dificuldades roteamento, nao numero de camadas)
Montagem: CadService e Eurotronics (em avaliacao ECS)
Local: Lab Elet MultiUsuario LAFEX em franca evolucao[gargalo] scope 4 GHz Tek (2.56 Gbs) → 20 GHz (10 Gbs)
Custo & Calendario:200 un * 1000 euro 2013-2014-2015
Andre Massafferri (CBPF) Upgrade RENAFAE 2012 19 / 25
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LHCb-Upgrade
Producao da motherboard TELL40 no Brasil
TELL40
{motherboard: alimentacao e controle (ECS!)
4 placas AMCs (mezzaninos): Stratix V
Upgrade requer a producao de 200−300 TELL40
tarefa: componentes︸ ︷︷ ︸12
nacionais
↔ PCB︸ ︷︷ ︸terceirizado
↔ montagem︸ ︷︷ ︸terceirizado
↔ teste︸︷︷︸tecnicos, estudantes
teste CPPM 8Gbs → GBT frame
desafios: arquivo gerber prototipo CPPM-MarseillePCB (16 camadas, Teflon → VT4): Micropress e Multek sinalizam que
estarao aptas no futuro proximo (dificuldades roteamento, nao numero de camadas)
Montagem: CadService e Eurotronics (em avaliacao ECS)
Local: Lab Elet MultiUsuario LAFEX em franca evolucao[gargalo] scope 4 GHz Tek (2.56 Gbs) → 20 GHz (10 Gbs)
Custo & Calendario:200 un * 1000 euro 2013-2014-2015
Andre Massafferri (CBPF) Upgrade RENAFAE 2012 19 / 25
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LHCb-Upgrade
Transmissao por Fibras Opticas
Upgrade LHCb requer a instalacao de 12K fibras opticasFront-End ⇔ TELL40
Fibras opticas da empresa Furukawa, Sao Paulo, seguem padroesinternacionais
→ 400 metros fibra duplexenviado pela UFRJ pro CERNavaliacao esta semana
Verificacao e Instalacao→ grupos brasileiros
Custo & Calendario:1000 cabos (12 fibras / 100 m / conector) = R$ 2580/cabo (com taxas !)
2015-2016-2017
Electronics Architecture of the LHCb Upgrade Reference: LHCb-PUB-2011-011 LHCb Technical Note Revision: 1.0 Issue: Last modified: Use of the GBT and Versatile Link
page 23 23
11. Use of the GBT and Versatile Link
The GigaBit Transceiver chip-set and Versatile Link have been developed as generic building blocks for data transmission, TFC and slow-control systems. The GBT chip-set consists of radiation-tolerant components for mounting in the FE modules and compatible firmware for commercial FPGAs in the BE modules. The GBT is designed to be operated in duplex or simplex mode. The Versatile Link project offers radiation qualified electro-optical components to implement a complete optical transmission system.
Details of the GBT can be found in [2], but the most relevant points for LHCb are summarised here, together with suggestions for implementation. The components of the chip-set and the versatile link are shown in Figure 6. The trans-impedance amplifier (TIA), PIN diode (PD), laser driver (LD) and laser will be mounted together in a bi-directional Small-Form-Pluggable (SFP) Package. Another option will be a dual-transmitter SFP where the receiver components are replaced by a second transmitter channel.
Figure 6: GBT chipset
The GBTX is the serialiser/deserialiser chip operating at a serial rate of 4.8 Gbit/s, and transmits 120-bit words of data arriving at 40 MHz. The allocation of the 120 bits is shown in Figure 7.
1. The header (H) and forward-error-correction (FEC) fields are not available to the user.
2. The data (D) field is fully available to the user for data transmission. The GBT accepts user data in a parallel or serial mode using an interface based on ‘E-ports’[2]. Parallel mode uses a 40-bit bus running at 80 Mbit/s. Serial mode has different configurations, from forty E-ports running at 80 Mbit/s down to eight E-ports running at 320 Mbit/s.
3. The slow-control (SC) field is divided into 2 bits reserved for internal configuration of the GBT and 2 bits available to the user. These 2 user bits will be transmitted/received by an E-port running at 80 Mbit/s. This E-port can be interfaced to the GBT-SCA (slow control
GBTX
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LHCb-Upgrade
Transmissao por Fibras Opticas
Upgrade LHCb requer a instalacao de 12K fibras opticasFront-End ⇔ TELL40Fibras opticas da empresa Furukawa, Sao Paulo, seguem padroesinternacionais
→ 400 metros fibra duplexenviado pela UFRJ pro CERNavaliacao esta semana
Verificacao e Instalacao→ grupos brasileiros
Custo & Calendario:1000 cabos (12 fibras / 100 m / conector) = R$ 2580/cabo (com taxas !)
2015-2016-2017
Electronics Architecture of the LHCb Upgrade Reference: LHCb-PUB-2011-011 LHCb Technical Note Revision: 1.0 Issue: Last modified: Use of the GBT and Versatile Link
page 23 23
11. Use of the GBT and Versatile Link
The GigaBit Transceiver chip-set and Versatile Link have been developed as generic building blocks for data transmission, TFC and slow-control systems. The GBT chip-set consists of radiation-tolerant components for mounting in the FE modules and compatible firmware for commercial FPGAs in the BE modules. The GBT is designed to be operated in duplex or simplex mode. The Versatile Link project offers radiation qualified electro-optical components to implement a complete optical transmission system.
Details of the GBT can be found in [2], but the most relevant points for LHCb are summarised here, together with suggestions for implementation. The components of the chip-set and the versatile link are shown in Figure 6. The trans-impedance amplifier (TIA), PIN diode (PD), laser driver (LD) and laser will be mounted together in a bi-directional Small-Form-Pluggable (SFP) Package. Another option will be a dual-transmitter SFP where the receiver components are replaced by a second transmitter channel.
Figure 6: GBT chipset
The GBTX is the serialiser/deserialiser chip operating at a serial rate of 4.8 Gbit/s, and transmits 120-bit words of data arriving at 40 MHz. The allocation of the 120 bits is shown in Figure 7.
1. The header (H) and forward-error-correction (FEC) fields are not available to the user.
2. The data (D) field is fully available to the user for data transmission. The GBT accepts user data in a parallel or serial mode using an interface based on ‘E-ports’[2]. Parallel mode uses a 40-bit bus running at 80 Mbit/s. Serial mode has different configurations, from forty E-ports running at 80 Mbit/s down to eight E-ports running at 320 Mbit/s.
3. The slow-control (SC) field is divided into 2 bits reserved for internal configuration of the GBT and 2 bits available to the user. These 2 user bits will be transmitted/received by an E-port running at 80 Mbit/s. This E-port can be interfaced to the GBT-SCA (slow control
GBTX
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LHCb-Upgrade
Transmissao por Fibras Opticas
Upgrade LHCb requer a instalacao de 12K fibras opticasFront-End ⇔ TELL40Fibras opticas da empresa Furukawa, Sao Paulo, seguem padroesinternacionais
→ 400 metros fibra duplexenviado pela UFRJ pro CERNavaliacao esta semana
Verificacao e Instalacao→ grupos brasileiros
Custo & Calendario:1000 cabos (12 fibras / 100 m / conector) = R$ 2580/cabo (com taxas !)
2015-2016-2017
Electronics Architecture of the LHCb Upgrade Reference: LHCb-PUB-2011-011 LHCb Technical Note Revision: 1.0 Issue: Last modified: Use of the GBT and Versatile Link
page 23 23
11. Use of the GBT and Versatile Link
The GigaBit Transceiver chip-set and Versatile Link have been developed as generic building blocks for data transmission, TFC and slow-control systems. The GBT chip-set consists of radiation-tolerant components for mounting in the FE modules and compatible firmware for commercial FPGAs in the BE modules. The GBT is designed to be operated in duplex or simplex mode. The Versatile Link project offers radiation qualified electro-optical components to implement a complete optical transmission system.
Details of the GBT can be found in [2], but the most relevant points for LHCb are summarised here, together with suggestions for implementation. The components of the chip-set and the versatile link are shown in Figure 6. The trans-impedance amplifier (TIA), PIN diode (PD), laser driver (LD) and laser will be mounted together in a bi-directional Small-Form-Pluggable (SFP) Package. Another option will be a dual-transmitter SFP where the receiver components are replaced by a second transmitter channel.
Figure 6: GBT chipset
The GBTX is the serialiser/deserialiser chip operating at a serial rate of 4.8 Gbit/s, and transmits 120-bit words of data arriving at 40 MHz. The allocation of the 120 bits is shown in Figure 7.
1. The header (H) and forward-error-correction (FEC) fields are not available to the user.
2. The data (D) field is fully available to the user for data transmission. The GBT accepts user data in a parallel or serial mode using an interface based on ‘E-ports’[2]. Parallel mode uses a 40-bit bus running at 80 Mbit/s. Serial mode has different configurations, from forty E-ports running at 80 Mbit/s down to eight E-ports running at 320 Mbit/s.
3. The slow-control (SC) field is divided into 2 bits reserved for internal configuration of the GBT and 2 bits available to the user. These 2 user bits will be transmitted/received by an E-port running at 80 Mbit/s. This E-port can be interfaced to the GBT-SCA (slow control
GBTX
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Custos & Agenda
Custos & Agenda
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Custos & Agenda
Upgrade-Eletronica: Agenda
2012validacao do cabo Furukawa (Brasil) no stand GBT/CERN
2012-13validacao protos motherboard-TELL40 BrasilGBT e Versatile link teste final CERN
2013-14-15(?)construcao de suportes/estruturasproducao TELL40, GBT e versatile links
2015-16-17compra de cabos: fibras opticas
2018instalacao: detectores, eletronica e cabos
2019commissioning e inıcio tomada dados
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Custos & Agenda
Upgrade-Eletronica: Agenda
2012validacao do cabo Furukawa (Brasil) no stand GBT/CERN
2012-13validacao protos motherboard-TELL40 BrasilGBT e Versatile link teste final CERN
2013-14-15(?)construcao de suportes/estruturasproducao TELL40, GBT e versatile links
2015-16-17compra de cabos: fibras opticas
2018instalacao: detectores, eletronica e cabos
2019commissioning e inıcio tomada dados
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Custos & Agenda
Upgrade-Eletronica: Agenda
2012validacao do cabo Furukawa (Brasil) no stand GBT/CERN
2012-13validacao protos motherboard-TELL40 BrasilGBT e Versatile link teste final CERN
2013-14-15(?)construcao de suportes/estruturasproducao TELL40, GBT e versatile links
2015-16-17compra de cabos: fibras opticas
2018instalacao: detectores, eletronica e cabos
2019commissioning e inıcio tomada dados
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Custos & Agenda
Upgrade-Eletronica: Agenda
2012validacao do cabo Furukawa (Brasil) no stand GBT/CERN
2012-13validacao protos motherboard-TELL40 BrasilGBT e Versatile link teste final CERN
2013-14-15(?)construcao de suportes/estruturasproducao TELL40, GBT e versatile links
2015-16-17compra de cabos: fibras opticas
2018instalacao: detectores, eletronica e cabos
2019commissioning e inıcio tomada dados
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Custos & Agenda
Upgrade-Eletronica: Agenda
2012validacao do cabo Furukawa (Brasil) no stand GBT/CERN
2012-13validacao protos motherboard-TELL40 BrasilGBT e Versatile link teste final CERN
2013-14-15(?)construcao de suportes/estruturasproducao TELL40, GBT e versatile links
2015-16-17compra de cabos: fibras opticas
2018instalacao: detectores, eletronica e cabos
2019commissioning e inıcio tomada dados
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Custos & Agenda
Upgrade-Eletronica: Agenda
2012validacao do cabo Furukawa (Brasil) no stand GBT/CERN
2012-13validacao protos motherboard-TELL40 BrasilGBT e Versatile link teste final CERN
2013-14-15(?)construcao de suportes/estruturasproducao TELL40, GBT e versatile links
2015-16-17compra de cabos: fibras opticas
2018instalacao: detectores, eletronica e cabos
2019commissioning e inıcio tomada dados
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Custos & Agenda
Custos
projeto descricao quantidade valor/unidade anoversao final 1 R$ 30000,00 2013
RioECSboard componentes onboard 200 US$ 530,00 2014componentes mezzanino 100 US$ 590,00 2014instalacao (meses/tecnico) 3 2500,00 CHF 2018
setup (adaptacao TELL40) 1 12528,00 euro 2013Test-Bench componentes importados 1 R$ 83000,00 2013
instalacao (meses/pesquisador) 6 4000,00 CHF 2018instalacao (meses/tecnico) 6 2500,00 CHF 2018
scope upgrade 1 US$ 156300,00 2014producao prototipo 3 1000,00 euro 2013
motherboard TELL40 componentes & fabricacao 200 1000,00 euro 2015instalacao (meses/tecnico) 6 2500,00 CHF 2018
cabos ∼ 370 0.7*2580,00 2015
Fibras Opticas cabos ∼ 370 0.7*2580,00 2016cabos ∼ 260 0.7*2580,00 2017
TOTAISRioECSboard = R$ 379 980,00Test-Bench = R$ 200 489,00
TELL40 production = R$ 881 729,00Fibras Opticas = R$ 1 806 000,00
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Conclusoes
Conclusoes
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Conclusoes
Conclusoes
Quatro linhas de atuacao em Eletronica de fronteira foramapresentadas envolvendo:
1 setores estrategicos/relevantes dentro da Colaboracao.
2 industria brasileira.
3 qualificacao de pessoal em instrumentacao cientıfica.
... podendo ser debitado da contribuicao brasileira ao Upgrade:common fund
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