Ele2mdd Lect 13 - Adc

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    Analog to Digital Converters

    Lecturer:

    Robert Ross

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    Overview

    Introduction to ADCs

    Types of ADCs

    Further Reading:

    R.J. Tocci, Digital Systems, Principles and

    Applications, Prentice Hall (Chapter 10) Demystifying Sigma-Delta ADCs, Maxim

    Semiconductors (http://www.maxim-ic.com/app-notes/index.mvp/id/1870)

    http://www.maxim-ic.com/app-notes/index.mvp/id/1870http://www.maxim-ic.com/app-notes/index.mvp/id/1870http://www.maxim-ic.com/app-notes/index.mvp/id/1870http://www.maxim-ic.com/app-notes/index.mvp/id/1870http://www.maxim-ic.com/app-notes/index.mvp/id/1870http://www.maxim-ic.com/app-notes/index.mvp/id/1870
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    Introduction ADCs

    The real world is full of analog, continuoussignals

    Microprocessors use digital electronics(encoded with discrete binary values) for

    processing Analog to Digital Converters (ADC or A/D)

    convert continuous analog signals to discretedigital numbers allowing digital electronics to

    sample real world signals ADCs are Mixed Signal Devices as theycombine analog circuits with DSP

    Reverse of the operation of the DAC (Digital toAnalog Converter)

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    Important Terms

    Resolution: Smallest analog incrementcorresponding to a 1 LSB change in conversion

    Voltage Reference: the voltage against which

    the input is compared, taken as the full scalevoltage

    Conversion Time: Time required for a completemeasurement

    Number of Bits: Number of bits used to digitallyencode the measured signal

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    Calculations

    Analog Input = K X Digital Output

    12

    n

    fsAKResolution =

    Afs: Analog full scalevoltage

    n: Number of bits

    Digital Output = Analog Input / K

    Number of voltage levels = 2n

    Number of voltage steps = 2n -1

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    Example

    A 10 bit ADC is used to sample over therange 0 to 5 Volts (VREF+ = 5V, VREF-=0V)

    What is the step size?

    5/ (210-1)= 4.89mV/step

    How would 2.1V be encoded?(2.1/4.89mV) = 429 (Binary: 0110101101)

    What voltage would correspond to 321being returned by the ADC?(321) x 4.89mV = 1.57V

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    Example

    A 8 bit ADC is used to sample over the range 0 to 2Volts (VREF+ = 2V, VREF-=0V)

    What is the step size?2/ (28 - 1)= 7.84mV/step

    How would 0.5V be encoded?0.5/7.84mV = 64 (Binary: 01000000) How would 0.75V be encoded?

    0.75/7.84mV = 96 (Binary: 01100000)

    How would 2V be encoded?

    2/7.84mV = 255 (Binary: 11111111) What voltage would a code of 5 belong to?

    5 x 7.84mV = 39mV

    What voltage would a code of 190 belong to?190 x 7.84mV = 1.49V

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    Nyquist Frequency

    Goal of ADC: Get the digital representation asclose to analog as possible

    In order to avoid loss of information, data needs

    to be sampled at least twice its highestfrequency component

    Eg. If you are sampling a 5kHz signal, yoursampling frequency (FS) should be at least

    10kHz This minimum sampling frequency is called the

    Nyquist Frequency (after Harry Nyquist)

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    Different Sampling Frequencies

    Period = 200msFin = 5kHz

    Undersampled:(5kHz)

    Digitised frequency

    is 0Hz (flat line)

    Undersampled:(7.5kHz)

    Digitised frequencyis 2.5kHz (Alias =10kHz 7.5kHz)

    Period = 200msFin = 5kHz

    Period = 400ms

    Fdig = 2.5kHz

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    Different Sampling Frequencies

    Nyquist Sampled(10kHz)

    Digitised frequency

    is 5kHz (the correctinput frequency)

    Oversampled:(20kHz)

    Digitised frequencyis 5kHz (Correctinput frequency)

    Period = 200msFin = 5kHz

    Period = 200msFdig = 5kHz

    Period = 200msFin = 5kHz

    Period = 200msFdig = 5kHz

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    Nyquist Summary

    To digitise signals accurately, the samplingfrequency (FS) must be at least twice themaximum frequency in the input (FIN(MAX))

    )(2 MAXINS FF

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    Types of ADCs

    Flash

    Ramp-Compare (Integrating)

    Successive Approximation Sigma-Delta

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    Flash ADC

    Flash ADC (AKA Direct orParallel ADC) uses alinear ladder ofcomparators to compare

    many different voltagereferences at the sametime

    Very fast -> HighBandwidth

    Requires manycomparators

    Therefore typically lowresolution

    v

    v

    v

    v

    v

    v

    v

    k

    k

    v 10

    7

    10

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    Ramp-Compare (Integrating) ADC

    A comparison voltageVAX is ramped up

    When the comparison

    voltage matches thesampled voltage (VA)the comparator istriggered the

    sampled voltage hasbeen determined

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    Ramp-Compare (Integrating) ADC

    Two differentimplementations:

    Timing of a charging

    capacitor Driving a DAC with a

    counter

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    Ramp-Compare (Integrating) ADC

    Variable Conversion Time(depends when rampsignal matches actualsignal)

    Best case = 1 cycle Worst case = 2n cycles Average conversion time:

    2n/2 Cycles, where n isthe number of bits

    Slower than Flash, butmuch less comparatorsallows for higheraccuracy

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    Successive Approximation ADC

    SuccessiveApproximation ADCs usea binary search toconverge on the closestquantisation level

    Binary search uses adivide and conqueralgorithm

    Binary search: Select middle element

    If too high select middleelement of lower group

    If too low select middleelement of upper group

    Repeat until 1 elementremains

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    Successive Approximation ADC

    Slower than Flash,but far fewercomparators allows

    for higher accuracy Constant conversion

    time: n cycles

    Each cycle allows thenext MSB to bedetermined

    4 Bit SAC

    Bit3

    =

    1

    Bit2

    =

    0

    Bit1

    =

    1

    Bit0

    =

    0

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    Sigma-Delta ADC

    Sigma-Delta ADCs use a 1-Bit ADC with some complex digitalprocessing to increase the resolution

    By oversampling a signal we can increase the resolution

    Oversampling a signal by a factor of 4 (4 x Fs) increases the SNR by6dB = 1 extra bit of resolution.

    By performing noise shaping, (shifting the noise away from the signalbefore filtering it out),

    First order: Doubling of sampling rate = 9dB increase for SNR

    Second order: Doubling of sampling rate = 15dB increase for SNR

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    Sigma-Delta ADC

    Difference amp used to compare signal input withfeedback from 1-bit DAC (which is simply high or low)

    Integrator performs noise shaping to improve SNR

    Comparator gives 0 or 1where the density of 1srepresents the analog voltage (lots of 1s over aspecified time interval corresponds to a higher voltage)

    Adding 1s up over time interval gives conversion value

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    Summary

    Analog to Digital converters allow digitalelectronics to sample real world analogsignals

    Nyquist rate specifies that sampling ratemust be at least twice the maximumfrequency of signal being sampled

    Depending on the resolution andbandwidth requirements different methodsof performing ADC can be used